PWM

void IntRegOutHM3SPWM(void)
{
int iTmpAx_0,iTmpBx_0,iTmpCx_0;
int iAlfa_0, iBeta_0;
int i3Alfa_0;
int iTmpNx_0;




iRegOutD_0 = iPiRegPwmD_0;
iRegOutQ_0 = iPiRegPwmQ_0;
iRegOutZ_0 = iVbusDiffReg_0;


iKSPWM_0=500;
// R/S Conv
iAlfa_0 = (((long)iRegOutD_0) * sPLL_0.iCosPll - (((long)iRegOutQ_0)*sPLL_0.iSinPll)) >> 10;
iBeta_0 = (((long)iRegOutD_0) * sPLL_0.iSinPll + (((long)iRegOutQ_0)*sPLL_0.iCosPll)) >> 10;


// 2/3 Conv
iVaAct_0 = ((long)iAlfa_0 * Cnst1 + (long)iRegOutZ_0 * Cnst1DSqrt2)>>12;
iVbAct_0 = (-(long)iAlfa_0 * Cnst1D2 + (long)iBeta_0 * CnstSqrt3D2 + (long)iRegOutZ_0 * Cnst1DSqrt2) >> 12;
iVcAct_0 = (-(long)iAlfa_0 * Cnst1D2 - (long)iBeta_0 * CnstSqrt3D2 + (long)iRegOutZ_0 * Cnst1DSqrt2) >> 12;




iUa2=(_IQmpy(_IQ(1.732050807568877),iBeta_0)+iAlfa_0)>>1;
iUb2=(-_IQmpy(_IQ(1.732050807568877),iBeta_0)+iAlfa_0)>>1;
iUc2=-iAlfa_0;


isector2=0;
if(iUa2>0)
isector2=1;
if(iUb2>0)
isector2=isector2+2;
if(iUc2>0)
isector2=isector2+4;




if(isector2==3)
    {
        iThreeSector_0=1;       
    }
    else if(isector2==1)
    {
        iThreeSector_0=2;       
    }
    else if(isector2==5)
    {
        iThreeSector_0=3;      
    }
    else if(isector2==4)
    {
        iThreeSector_0=4;       
    }
    else if(isector2==6)
    {
        iThreeSector_0=5;       
    }
    else if(isector2==2)
    {
        iThreeSector_0=6;
    }






i3Alfa_0 = (((long)iRegOutD_0) * sPLL_0.iCos3Pll - (((long)iRegOutQ_0)*sPLL_0.iSin3Pll)) >> 10;   
      iVa3Act_0 = (((long)i3Alfa_0 * Cnst1 + (long)iRegOutZ_0 * Cnst1DSqrt2)>>12);//+(sPLL_0.iCosPllT<<1);




iVgrid3Act_0 = ((long)iVa3Act_0*683)>>12 ;//683--1/6
            
  iVaAct_0=iVaAct_0-iVgrid3Act_0;
iVbAct_0=iVbAct_0-iVgrid3Act_0;
iVcAct_0=iVcAct_0-iVgrid3Act_0;
   


// Cal Compare Value


iTmpAx_0 = ((long)(abs(iVaAct_0))* iKSPWM_0) >> 12;
iTmpBx_0 = ((long)(abs(iVbAct_0))* iKSPWM_0) >> 12;
iTmpCx_0 = ((long)(abs(iVcAct_0))* iKSPWM_0) >> 12;


// uVaHrAct_0=(uint)(0xff00-((((long)(abs(iVaAct_0))* iKSPWM_0)<<4)&0xff00));
// uVbHrAct_0=(uint)(0xff00-((((long)(abs(iVbAct_0))* iKSPWM_0)<<4)&0xff00));
// uVcHrAct_0=(uint)(0xff00-((((long)(abs(iVcAct_0))* iKSPWM_0)<<4)&0xff00));

iTmpAx_0 = _IQsat((KVIENNASwPrdCnst-iTmpAx_0), KVIENNASwPrdCnst-iTestSpwmT_0, 1);
iTmpBx_0 = _IQsat((KVIENNASwPrdCnst-iTmpBx_0), KVIENNASwPrdCnst-iTestSpwmT_0, 1);
iTmpCx_0 = _IQsat((KVIENNASwPrdCnst-iTmpCx_0), KVIENNASwPrdCnst-iTestSpwmT_0, 1);



if(iTestSpwmType_0==0)
{
if(unACDCSysStatus.bit.bGridInverseFlag==1)
{
iTmpNx_0=iTmpAx_0;
iTmpAx_0=iTmpBx_0;
iTmpBx_0=iTmpNx_0;


if((iThreeSector_0==2)||(iThreeSector_0==3)||(iThreeSector_0==4))
{

EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; 
EPwm2Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm2Regs.AQCTLA.bit.CAD = AQ_SET;      
EPwm2Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm2Regs.CMPA.half.CMPA=iTmpAx_0;
}
else
{


EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; 
EPwm2Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;      
EPwm2Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm2Regs.CMPA.half.CMPA=KVIENNASwPrdCnst-iTmpAx_0;

}



if((iThreeSector_0==6)||(iThreeSector_0==1)||(iThreeSector_0==2))   // A:0-O,1-P;
{



EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR; 
EPwm3Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm3Regs.AQCTLA.bit.CAD = AQ_SET;      
EPwm3Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;


EPwm3Regs.CMPA.half.CMPA=iTmpBx_0;

}
else
{
EPwm3Regs.AQCTLA.bit.CAU = AQ_SET; 
EPwm3Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;      
EPwm3Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm3Regs.CMPA.half.CMPA=KVIENNASwPrdCnst-iTmpBx_0;
}



}
else
{
if((iThreeSector_0==6)||(iThreeSector_0==1)||(iThreeSector_0==2))   // A:0-O,1-P;
{

EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; 
EPwm2Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm2Regs.AQCTLA.bit.CAD = AQ_SET;      
EPwm2Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm2Regs.CMPA.half.CMPA=iTmpAx_0;
}
else
{


EPwm2Regs.AQCTLA.bit.CAU = AQ_SET; 
EPwm2Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;      
EPwm2Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm2Regs.CMPA.half.CMPA=KVIENNASwPrdCnst-iTmpAx_0;

}


if((iThreeSector_0==2)||(iThreeSector_0==3)||(iThreeSector_0==4))
{



EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR; 
EPwm3Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm3Regs.AQCTLA.bit.CAD = AQ_SET;      
EPwm3Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;


EPwm3Regs.CMPA.half.CMPA=iTmpBx_0;

}
else
{
EPwm3Regs.AQCTLA.bit.CAU = AQ_SET; 
EPwm3Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;      
EPwm3Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm3Regs.CMPA.half.CMPA=KVIENNASwPrdCnst-iTmpBx_0;
}


}



if((iThreeSector_0==4)||(iThreeSector_0==5)||(iThreeSector_0==6))
{
EPwm4Regs.AQCTLA.bit.CAU = AQ_CLEAR; 
EPwm4Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm4Regs.AQCTLA.bit.CAD = AQ_SET;      
EPwm4Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm4Regs.CMPA.half.CMPA=iTmpCx_0;
}
else
{
EPwm4Regs.AQCTLA.bit.CAU = AQ_SET; 
EPwm4Regs.AQCTLA.bit.PRD = AQ_NO_ACTION;          
EPwm4Regs.AQCTLA.bit.CAD = AQ_CLEAR;      
EPwm4Regs.AQCTLA.bit.ZRO = AQ_NO_ACTION;

EPwm4Regs.CMPA.half.CMPA=KVIENNASwPrdCnst-iTmpCx_0;
}

}
else 
{
if(unACDCSysStatus.bit.bGridInverseFlag==0)
{
EPwm2Regs.CMPA.half.CMPA=iTmpAx_0;
EPwm3Regs.CMPA.half.CMPA=iTmpBx_0;
EPwm4Regs.CMPA.half.CMPA=iTmpCx_0;


// EPwm2Regs.CMPA.half.CMPAHR=uVaHrAct_0;
// EPwm3Regs.CMPA.half.CMPAHR=uVbHrAct_0;
// EPwm4Regs.CMPA.half.CMPAHR=uVcHrAct_0;
}
else
{
EPwm2Regs.CMPA.half.CMPA=iTmpBx_0;
EPwm3Regs.CMPA.half.CMPA=iTmpAx_0;
EPwm4Regs.CMPA.half.CMPA=iTmpCx_0;


// EPwm2Regs.CMPA.half.CMPAHR=uVbHrAct_0;
// EPwm3Regs.CMPA.half.CMPAHR=uVaHrAct_0;
// EPwm4Regs.CMPA.half.CMPAHR=uVcHrAct_0;
}
}


/*



if(unACDCSysStatus.bit.bGridInverseFlag==0)
{
EPwm2Regs.CMPA.half.CMPA=iTmpAx_0;
EPwm3Regs.CMPA.half.CMPA=iTmpBx_0;
EPwm4Regs.CMPA.half.CMPA=iTmpCx_0;


// EPwm2Regs.CMPA.half.CMPAHR=uVaHrAct_0;
// EPwm3Regs.CMPA.half.CMPAHR=uVbHrAct_0;
// EPwm4Regs.CMPA.half.CMPAHR=uVcHrAct_0;
}
else
{
EPwm2Regs.CMPA.half.CMPA=iTmpBx_0;
EPwm3Regs.CMPA.half.CMPA=iTmpAx_0;
EPwm4Regs.CMPA.half.CMPA=iTmpCx_0;


// EPwm2Regs.CMPA.half.CMPAHR=uVbHrAct_0;
// EPwm3Regs.CMPA.half.CMPAHR=uVaHrAct_0;
// EPwm4Regs.CMPA.half.CMPAHR=uVcHrAct_0;
}


*/


}