Vivado ILA调试的没有波形的小问题

WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3.
Resolution: 
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active OR
2. Manually launch hw_server with -e "set xsdb-user-bscan " to detect the debug hub at User Scan Chain of 2 or 4. To determine the user scan chain setting, open the implemented design and use: get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub].
WARNING: [Labtools 27-1974] Mismatch between the design programmed into the device xc7z010_1 and the probes file E:/Xilinx/example/dma_sg_m/dma_sg_m.runs/impl_1/debug_nets.ltx.
The device design has 0 ILA core(s) and 0 VIO core(s). The probes file has 1 ILA core(s) and 0 VIO core(s).
Resolution: 
1. Reprogram device with the correct programming file and associated probes file OR

2. Goto device properties and associate the correct probes file with the programming file already programmed in the device.

经过了在2015.1的版本里 把Netlist里标记信号为mark debug,和Synthesis下 Setup Debug以后，发现debug probes空空如也，什么也没有，

出现了上面两个警告，原来是没有自由运行的时钟，因为debug默认是使用PS的FCLK，在PS还没运行起来的时候就没有啦，所以现在Xilinx SDK里面把程序设置断点后跑起来，然后在Open Hardware ,就出现波形啦！