Linux_2.6之makefiles个人理解性翻译

打开linux-2.6.0\linux-2.6.0\Documentation\kbuild\makefiles.txt,如下部分，关键性语句，口语化翻译，目录就不看了，看第一部分：Overview

Linux Kernel Makefiles

This document describes the Linux kernel Makefiles.

=== Table of Contents

    === 1 Overview
    === 2 Who does what
    === 3 The kbuild Makefiles
       --- 3.1 Goal definitions
       --- 3.2 Built-in object goals - obj-y
       --- 3.3 Loadable module goals - obj-m
       --- 3.4 Objects which export symbols
       --- 3.5 Library file goals - lib-y
       --- 3.6 Descending down in directories
       --- 3.7 Compilation flags
       --- 3.8 Command line dependency
       --- 3.9 Dependency tracking
       --- 3.10 Special Rules

    === 4 Host Program support
       --- 4.1 Simple Host Program
       --- 4.2 Composite Host Programs
       --- 4.3 Defining shared libraries  
       --- 4.4 Using C++ for host programs
       --- 4.5 Controlling compiler options for host programs
       --- 4.6 When host programs are actually built

    === 5 Kbuild clean infrastructure

    === 6 Architecture Makefiles
       --- 6.1 Set variables to tweak the build to the architecture
       --- 6.2 Add prerequisites to prepare:
       --- 6.3 List directories to visit when descending
       --- 6.4 Architecture specific boot images
       --- 6.5 Building non-kbuild targets
       --- 6.6 Commands useful for building a boot image
       --- 6.7 Custom kbuild commands

    === 7 Kbuild Variables
    === 8 Makefile language
    === 9 Credits
    === 10 TODO

=== 1 Overview

The Makefiles have five parts:

    Makefile        the top Makefile.
    .config            the kernel configuration file.
    arch/$(ARCH)/Makefile    the arch Makefile.
    scripts/Makefile.*    common rules etc. for all kbuild Makefiles.
    kbuild Makefiles    there are about 500 of these.

The top Makefile reads the .config file, which comes from the kernel
configuration process.
主目录makefile读.config.文件，.config来自于内核配置过程(即执行make menuconfig命令后)
The top Makefile is responsible for building two major products: vmlinux
(the resident kernel image) and modules (any module files).
It builds these goals by recursively descending into the subdirectories of
the kernel source tree.
The list of subdirectories which are visited depends upon the kernel
configuration.子目录由内核配置决定是否访问
 The top Makefile textually includes an arch Makefile
with the name arch/$(ARCH)/Makefile.
主目录makefile文本包括一个arch的makefile，文本表示为arch/$(ARCH)/Makefile
 The arch Makefile supplies
architecture-specific information to the top Makefile.
arch的makefile提供确定的硬件架构信息给主目录makefile

Each subdirectory has a kbuild Makefile which carries out the commands
passed down from above.
每个子目录有个makefile接收上层传递下来的命令
 The kbuild Makefile uses information from the
.config file to construct various file lists used by kbuild to build 
any built-in or modular targets.
这个makefile用来自.config的信息来构造各种文件列表，来内嵌入内核或者模块化的目标(即日常理解的.o文件)
scripts/Makefile.* contains all the definitions/rules etc. that
are used to build the kernel based on the kbuild makefiles.
脚本makefile包括所有定义与规则(进去到scripts/makefile：scripts文件夹的东西包括了内核生成过程中所有的协助程序，那么scripts\makefile就把这些协程序编译连接起来)

=== 2 Who does what

四种类型的开发人员，，，，

People have four different relationships with the kernel Makefiles.

*Users* are people who build kernels.  These people type commands such as
"make menuconfig" or "make".  They usually do not read or edit
any kernel Makefiles (or any other source files).

*Normal developers* are people who work on features such as device
drivers, file systems, and network protocols.  These people need to
maintain the kbuild Makefiles for the subsystem that they are
working on.  In order to do this effectively, they need some overall
knowledge about the kernel Makefiles, plus detailed knowledge about the
public interface for kbuild.

*Arch developers* are people who work on an entire architecture, such
as sparc or ia64.  Arch developers need to know about the arch Makefile
as well as kbuild Makefiles.

*Kbuild developers* are people who work on the kernel build system itself.
These people need to know about all aspects of the kernel Makefiles.

This document is aimed towards normal developers and arch developers.

=== 3 The kbuild Makefiles

Most Makefiles within the kernel are kbuild Makefiles that use the
kbuild infrastructure. This chapter introduce the syntax used in the
kbuild makefiles.本章讲语法

Section 3.1 "Goal definitions" is a quick intro, further chapters provide
more details, with real examples.

--- 3.1 Goal definitions

    Goal definitions are the main part (heart) of the kbuild Makefile.
    These lines define the files to be built, any special compilation
    options, and any subdirectories to be entered recursively.

    The most simple kbuild makefile contains one line:
最简单的语句包括一行
    Example:
        obj-y += foo.o

    This tell kbuild that there is one object in that directory named
    foo.o. foo.o will be build from foo.c or foo.S.
表示目录中的foo.c或者foo.s会被编译成foo.o
    If foo.o shall be built as a module, the variable obj-m is used.
    如果被编译成模块，则用obj-m 
    Therefore the following pattern is often used:
    因此下面模式经常使用
    Example:
        obj-$(CONFIG_FOO) += foo.o
$(CONFIG_FOO)可以是y或者m，
    $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
    If CONFIG_FOO is neither y nor m, then the file will not be compiled
    nor linked.
    如果既不是y也不是m，则不编译也不连接。

--- 3.2 Built-in object goals - obj-y
    
    The kbuild Makefile specifies object files for vmlinux
    in the lists $(obj-y).  These lists depend on the kernel
    configuration.
    kbuild makefile 指定列表目标文件为了vmlinux，这些list依赖于内核配置

    Kbuild compiles all the $(obj-y) files.  It then calls
    "$(LD) -r" to merge these files into one built-in.o file.
    built-in.o is later linked into vmlinux by the parent Makefile.
    Kbuild 编译所有的$(obj-y)文件，它调用"$(LD) -r"来合并这些文件到一个内嵌.o文件，
    内嵌.o文件稍后被父级makefile连接到vmlinux
    
    The order of files in $(obj-y) is significant.  Duplicates in
    the lists are allowed: the first instance will be linked into
    built-in.o and succeeding instances will be ignored.
    $(obj-y)的文件顺序很重要。列表中有重复的两条语句是允许的：第一句有效，第二句忽略

    Link order is significant, because certain functions
    (module_init() / __initcall) will be called during boot in the
    order they appear. So keep in mind that changing the link
    order may e.g.  change the order in which your SCSI
    controllers are detected, and thus you disks are renumbered.
    连接顺序有用，因为确定的函数（比如module_init() / __initcall）在boot过程中以他们出现的顺序被调用。
    比如改变SCSI控制器被侦测的顺序，将导致你的硬盘被重新编号。
    
    Example:
        #drivers/isdn/i4l/Makefile
        # Makefile for the kernel ISDN subsystem and device drivers.
        # Each configuration option enables a list of files.
        obj-$(CONFIG_ISDN)             += isdn.o
        obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
        先CONFIG_ISDN，后CONFIG_ISDN_PPP_BSDCOMP。（感觉像4G网络的先打开网关，再拨号）

--- 3.3 Loadable module goals - obj-m可装载模块目标

    $(obj-m) specify object files which are built as loadable
    kernel modules.
    $(obj-m)标注可装载的模块

    A module may be built from one source file or several source
    files. In the case of one source file, the kbuild makefile
    simply adds the file to $(obj-m).
    一个模块可由一或多个文件组成，如果是一个文件，简单添加这个文件到 $(obj-m)

    Example:
        #drivers/isdn/i4l/Makefile
        obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o

    Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
    例子中 $(CONFIG_ISDN_PPP_BSDCOMP)等于m,（在其他某个地方#define $(CONFIG_ISDN_PPP_BSDCOMP) m )
    
    If a kernel module is built from several source files, you specify
    that you want to build a module in the same way as above.
    如果一个内核模块由多个源文件组成，你想组成一个模块，类似上面的方法
    
    Kbuild needs to know which the parts that you want to build your
    module from, so you have to tell it by setting an
    $(-objs) variable.
    Kbuild需要知道有哪些文件，所以用这种格式$(-objs) variable
    
    Example:比如：
        #drivers/isdn/i4l/Makefile
        obj-$(CONFIG_ISDN) += isdn.o
        isdn-objs := isdn_net_lib.o isdn_v110.o isdn_common.o
        isdn.o由isdn_net_lib.o isdn_v110.o isdn_common.o合成

    In this example, the module name will be isdn.o. Kbuild will
    compile the objects listed in $(isdn-objs) and then run
    "$(LD) -r" on the list of these files to generate isdn.o.
    上面例子，Kbuild通过isdn_net_lib.o isdn_v110.o isdn_common.o连接成isdn.o

    Kbuild recognises objects used for composite objects by the suffix
    -objs, and the suffix -y. This allows the Makefiles to use
    the value of a CONFIG_ symbol to determine if an object is part
    of a composite object.
    Kbuild通过-objs和-y识别目标。Makefiles用一个CONFIG_符号的值觉得是否一个目标文件是一个总目标文件的一部分。

    Example:
        #fs/ext2/Makefile
            obj-$(CONFIG_EXT2_FS)        += ext2.o
         ext2-y                       := balloc.o bitmap.o
            ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o
    
    In this example xattr.o is only part of the composite object
    ext2.o, if $(CONFIG_EXT2_FS_XATTR) evaluates to 'y'.
    如果$(CONFIG_EXT2_FS_XATTR)=y, xattr.o是ext2.o一部分

    Note: Of course, when you are building objects into the kernel,
    the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
    kbuild will build an ext2.o file for you out of the individual
    parts and then link this into built-in.o, as you would expect.
    当然，如果你用上面的语法，也可以编进内核。如果CONFIG_EXT2_FS=y，只编一个独立的文件。

--- 3.4 Objects which export symbols

    No special notation is required in the makefiles for
    modules exporting symbols.
    没有特殊记号符

--- 3.5 Library file goals - lib-y 库文件用lib-y标识

    Objects listed with obj-* are used for modules or
    combined in a built-in.o for that specific directory.
    obj-*是为确定目录路径准备的。
    There is also the possibility to list objects that will
    be included in a library, lib.a.
    也可能把目标文件列表包含到一个库里。
    All objects listed with lib-y are combined in a single
    library for that directory.
    所有目标文件以列表形式，包含到一个单独的静态库。
    Objects that are listed in obj-y and additional listed in
    lib-y will not be included in the library, since they will anyway
    be accessible.
    既被obj-y又被lib -y的目标文件不包含在静态库，因为他们是可用的。（静态库是封装起来看不到具体函数的手段）
    For consistency objects listed in lib-m will be included in lib.a. 

    Note that the same kbuild makefile may list files to be built-in
    and to be part of a library. Therefore the same directory
    may contain both a built-in.o and a lib.a file.
    注意相同的kbuild makefile 可能把文件内嵌或者成为库的一部分，因此相同的库可能包含内嵌.o文件和库文件.a
    
    Example:举例
        #arch/i386/lib/Makefile
        lib-y    := checksum.o delay.o

    This will create a library lib.a based on checksum.o and delay.o.
    上面语句将创造一个库，lib.a 基于checksum.o和delay.o
    For kbuild to actually recognize that there is a lib.a being build
    the directory shall be listed in libs-y.
    为了让kbuild识别到有个lib.a在被构建，目录需要被列在libs-y
    See also "6.3 List directories to visit when descending".见6.3
    
    Usage of lib-y is normally restricted to lib/ and arch/*/lib.
    lib-y经常备用到这两目录
    
--- 3.6 Descending down in directories降下来到目录？

    A Makefile is only responsible for building objects in its own
    directory.一个makefile只负责构建目标在它自己的目录
    Files in subdirectories should be taken care of by
    Makefiles in these subdirs. 子目录的的文件需要被子目录的makefiles管。
    The build system will automatically
    invoke make recursively in subdirectories, provided you let it know of
    them.这套构造系统将自动递归调用子目录的，假如你让它知道这套关系

    To do so obj-y and obj-m are used.
    ext2 lives in a separate directory, and the Makefile present in fs/
    tells kbuild to descend down using the following assignment.
    为了实现这些，obj-y和obj-m被使用。
    ext2在分开的不同的目录，而且当前目录的makefile在fs/
    告诉kbuild去下一层目录，用如下配置：
    Example:
        #fs/Makefile
        obj-$(CONFIG_EXT2_FS) += ext2/

    If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
    the corresponding obj- variable will be set, and kbuild will descend
    down in the ext2 directory.
    y或者m,kbuild将去下一级目录。
    Kbuild only uses this information to decide that it needs to visit
    the directory, it is the Makefile in the subdirectory that
    specifies what is modules and what is built-in.
    kbuild觉得是否去访问这个目录，子目录决定是模块还是built in
    
    It is good practice to use a CONFIG_ variable when assigning directory
    names. This allows kbuild to totally skip the directory if the
    corresponding CONFIG_ option is neither 'y' nor 'm'.
    它允许kbuild调过，当既不是y 也不是m

--- 3.7 Compilation flags编译标志

    EXTRA_CFLAGS, EXTRA_AFLAGS, EXTRA_LDFLAGS, EXTRA_ARFLAGS

    All the EXTRA_ variables apply only to the kbuild makefile
    where they are assigned. 
    所有EXTRA_变量只在指定的地方用。
    The EXTRA_ variables apply to all
    commands executed in the kbuild makefile.
    这个EXTRA_变量用于所有命令
    $(EXTRA_CFLAGS) specifies options for compiling C files with
    $(CC).
    EXTRA_CFLAGS指定选项给正在编译的c文件以$(CC)

    Example:
        # drivers/sound/emu10k1/Makefile
        EXTRA_CFLAGS += -I$(obj)
        ifdef DEBUG
            EXTRA_CFLAGS += -DEMU10K1_DEBUG
        endif

    This variable is necessary because the top Makefile owns the
    variable $(CFLAGS) and uses it for compilation flags for the
    entire tree.
    这个变量是必要的，因为顶部makefile拥有这个变量，并用它作为整个树的编译标志

    $(EXTRA_AFLAGS) is a similar string for per-directory options
    when compiling assembly language source.
    $(EXTRA_AFLAGS) 是相似的字符串（在每个目录选项中）当编译汇编语言时

    Example:
        #arch/x86_64/kernel/Makefile
        EXTRA_AFLAGS := -traditional

    $(EXTRA_LDFLAGS) and $(EXTRA_ARFLAGS) are similar strings for
    per-directory options to $(LD) and $(AR).

    Example:
        #arch/m68k/fpsp040/Makefile
        EXTRA_LDFLAGS := -x

    CFLAGS_$@, AFLAGS_$@
    CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
    kbuild makefile.

    $(CFLAGS_$@) specifies per-file options for $(CC).  The $@
    part has a literal value which specifies the file that it is for.

    Example:
        # drivers/scsi/Makefile
        CFLAGS_aha152x.o =   -DAHA152X_STAT -DAUTOCONF
        CFLAGS_gdth.o    = # -DDEBUG_GDTH=2 -D__SERIAL__ -D__COM2__ \
                     -DGDTH_STATISTICS
        CFLAGS_seagate.o =   -DARBITRATE -DPARITY -DSEAGATE_USE_ASM

后面的实在翻译不下去了，有比较新奇的是，第四节讲在编译内核时，有时会需要编译并运行一个程序。还有第五接比较常用的就是make clean的实现（会删掉所有make编译产生的文件），help的实现方法等等，

暂时不用的话，很难记住这些makefile语言。