100ask_imx6ull设备树文件：100ask_imx6ull-14x14.dts

/*
 * Copyright (C) 2016 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/dts-v1/;

#include 
#include "imx6ull.dtsi"

/ {
	model = "Freescale i.MX6 ULL 14x14 EVK Board";
	compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";

	chosen {
		stdout-path = &uart1;
	};

	memory {
		reg = <0x80000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x14000000>;
			linux,cma-default;
		};
	};

	backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm1 0 5000000>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <7>;
		status = "okay";
	};

	pxp_v4l2 {
		compatible = "fsl,imx6ul-pxp-v4l2", "fsl,imx6sx-pxp-v4l2", "fsl,imx6sl-pxp-v4l2";
		status = "okay";
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_can_3v3: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "can-3v3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
		};

		reg_usb_ltemodule: regulator@1 {
			compatible = "regulator-fixed";
			regulator-name = "ltemodule-pwr";
			regulator-min-microvolt = <3800000>;
			regulator-max-microvolt = <3800000>;
			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-boot-on;
		};

		reg_gpio_wifi: regulator@2 {
			compatible = "regulator-fixed";
			regulator-name = "wifi-pwr";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
			regulator-boot-on;
		};

	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds>;

		led0: cpu {
			label = "cpu";
			gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";

		user {
			label = "User Button";
			gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
			gpio-key,wakeup;
			linux,code = <KEY_1>;
		};
	};
	sound {
			compatible = "fsl,imx6ul-evk-wm8960",
					 "fsl,imx-audio-wm8960";
			model = "wm8960-audio";
			cpu-dai = <&sai2>;
			audio-codec = <&codec>;
			asrc-controller = <&asrc>;
			codec-master;
			gpr = <&gpr 4 0x100000 0x100000>;
			hp-det = <3 0>;
			/*hp-det-gpios = <&gpio5 4 0>;
			mic-det-gpios = <&gpio5 4 0>;*/
			audio-routing =
				"Headphone Jack", "HP_L",
				"Headphone Jack", "HP_R",
				"Ext Spk", "SPK_LP",
				"Ext Spk", "SPK_LN",
				"Ext Spk", "SPK_RP",
				"Ext Spk", "SPK_RN",
				"LINPUT2", "Mic Jack",
				"LINPUT3", "Mic Jack",
				"RINPUT1", "Main MIC",
				"RINPUT2", "Main MIC",	
				"Mic Jack", "MICB",
				"Main MIC", "MICB",
				"CPU-Playback", "ASRC-Playback",
				"Playback", "CPU-Playback",
				"ASRC-Capture", "CPU-Capture",
				"CPU-Capture", "Capture";
				status = "okay";
		};
	
	spi4 {
		compatible = "spi-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_spi4>;
		pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
		status = "okay";
		gpio-sck = <&gpio5 11 0>;
		gpio-mosi = <&gpio5 10 0>;
		cs-gpios = <&gpio5 7 0>;
		num-chipselects = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		gpio_spi: gpio_spi@0 {
			compatible = "fairchild,74hc595";
			gpio-controller;
			#gpio-cells = <2>;
			reg = <0>;
			registers-number = <1>;
			registers-default = /bits/ 8 <0x57>;
			spi-max-frequency = <10000>;
		};
	};
	
	sii902x_reset: sii902x-reset {
			compatible = "gpio-reset";
			reset-gpios = <&gpio_spi 1 GPIO_ACTIVE_LOW>;
			reset-delay-us = <100000>;
			#reset-cells = <0>;
			status = "okay";
		};

};

&gpmi{
	status = "disabled";
};
&cpu0 {
	arm-supply = <&reg_arm>;
	soc-supply = <&reg_soc>;
};

&clks {
	assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
	assigned-clock-rates = <786432000>;
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet1>;
	phy-mode = "rmii";
	phy-handle = <&ethphy0>;
	phy-reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	phy-reset-duration = <26>;
	status = "okay";
};

&fec2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet2>;
	phy-mode = "rmii";
	phy-handle = <&ethphy1>;
	phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
	phy-reset-duration = <26>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			smsc,disable-energy-detect;
			reg = <0>;
		};
		ethphy1: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			smsc,disable-energy-detect;
			reg = <1>;
		};
	};
};

&flexcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_flexcan1>;
	xceiver-supply = <&reg_can_3v3>;
	status = "okay";
};
&gpc {
	fsl,cpu_pupscr_sw2iso = <0x1>;
	fsl,cpu_pupscr_sw = <0x0>;
	fsl,cpu_pdnscr_iso2sw = <0x1>;
	fsl,cpu_pdnscr_iso = <0x1>;
	fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";
};

&i2c2 {
	clock_frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	codec: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
		clocks = <&clks IMX6UL_CLK_SAI2>;
		clock-names = "mclk";
		wlf,shared-lrclk;
		};
         sii902x: sii902x@39 {
                 compatible = "SiI,sii902x";
                 pinctrl-names = "default";
                 reset-names="sii902x";
                 pinctrl-0 = <&pinctrl_sii902x>;
                 resets = <&sii902x_reset>;
                 interrupt-parent = <&gpio1>;
                 interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
                 mode_str ="1280x720M@60";
                 bits-per-pixel = <16>;
                 reg = <0x39>;
                 status = "okay";    
         };


        gt9xx@5d {
                compatible = "goodix,gt9xx";
                reg = <0x5d>;
                status = "okay";
                interrupt-parent = <&gpio1>;
                interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_tsc_reset &pinctrl_touchscreen_int>;
                /*pinctrl-1 = <&pinctrl_tsc_irq>;*/
                /*pinctrl-names = "default", "int-output-low", "int-output-high", "int-input";
                pinctrl-0 = <&ts_int_default>;
                pinctrl-1 = <&ts_int_output_low>;
                pinctrl-2 = <&ts_int_output_high>;
                pinctrl-3 = <&ts_int_input>;
                */
                reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
                irq-gpios = <&gpio1 5 IRQ_TYPE_EDGE_FALLING>;
                irq-flags = <2>;                /*1:rising 2: falling*/

                touchscreen-max-id = <1>;
                touchscreen-size-x = <800>;
                touchscreen-size-y = <480>;
                touchscreen-max-w = <1024>;
                touchscreen-max-p = <1024>;
                /*touchscreen-key-map = <172>, <158>;*/ /*KEY_HOMEPAGE, KEY_BACK*/

                goodix,type-a-report = <0>;
                goodix,driver-send-cfg = <1>;
                goodix,create-wr-node = <1>;
                goodix,wakeup-with-reset = <0>;
                goodix,resume-in-workqueue = <0>;
                goodix,int-sync = <0>;
                goodix,swap-x2y = <0>;
                goodix,esd-protect = <0>;
                goodix,pen-suppress-finger = <0>;
                goodix,auto-update = <0>;
                goodix,auto-update-cfg = <0>;
                goodix,power-off-sleep = <0>;

                /*7*/
                goodix,cfg-group0 = [
                00 20 03 E0 01 05 0D 00 01 08
                28 0F 50 32 03 05 00 00 00 00
                00 00 00 00 00 00 00 8A 2A 0C
                45 47 0C 08 00 00 00 02 02 2D
                00 00 00 00 00 03 64 32 00 00
                00 28 64 94 C5 02 07 00 00 04
                9C 2C 00 8F 34 00 84 3F 00 7C
                4C 00 77 5B 00 77 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 18 16 14 12 10 0E 0C 0A
                08 06 04 02 FF FF 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 16 18 1C 1D 1E 1F 20 21
                22 24 13 12 10 0F 0A 08 06 04
                02 00 FF FF FF FF FF FF 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 00 00 24 01
                ];

                /*4.3*/
                goodix,cfg-group1 = [
                97 E0 01 10 01 05 0D 00 01 00
                00 05 5A 46 53 11 00 00 11 11
                14 14 14 22 0A 04 00 00 00 00
                00 00 53 00 14 00 00 84 00 00
                3C 00 00 64 1E 28 87 27 08 32
                34 05 0D 20 33 60 11 02 24 00
                00 64 80 80 14 02 00 00 54 89
                68 85 6D 82 72 80 76 7D 7B 7B
                00 00 00 00 00 00 00 F0 50 3C
                FF FF 07 00 00 00 02 14 14 03
                04 00 21 64 0A 00 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                32 20 50 3C 3C 00 00 00 00 00
                0D 06 0C 05 0B 04 0A 03 FF FF
                FF FF FF FF 00 01 02 03 04 05
                06 07 08 09 0A 0B 0C 0D FF FF
                FF FF FF FF FF FF FF FF FF FF
                00 00 00 00 00 00 00 00 00 00
                00 00 00 00 3C 00 05 1E 00 02
                2A 1E 19 14 02 00 03 0A 05 00
                00 00 00 00 00 00 01 FF FF 86
                22 03 00 00 33 00 0F 00 00 00
                50 3C 50 00 00 00 00 2A 01
                ];

                /*5*/
                goodix,cfg-group2 = [
                00 20 03 E0 01 05 3C 00 01 08
                28 0C 50 32 03 05 00 00 00 00
                00 00 00 17 19 1E 14 8B 2B 0D
                33 35 0C 08 00 00 00 9A 03 11
                00 01 00 00 00 00 00 32 00 00
                00 20 58 94 C5 02 00 00 00 04
                B0 23 00 93 2B 00 7B 35 00 69
                41 00 5B 4F 00 5B 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 02 04 06 08 0A 0C 0E 10
                12 14 16 18 1A FF 00 00 00 00
                00 00 00 00 00 00 00 00 00 00
                00 00 00 02 04 06 08 0A 0C 0F
                10 12 13 16 18 1C 1D 1E 1F 20
                21 22 24 26 FF FF FF FF 00 00
                00 FF FF FF FF FF FF FF FF FF
                FF FF FF FF 48 01
                ];

        };


};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_1>;
	imx6ul-evk {
		pinctrl_hog_1: hoggrp-1 {
			fsl,pins = <
				MX6UL_PAD_UART1_RTS_B__GPIO1_IO19	0x17059 /* SD1 CD */
				MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x17059 /* USB OTG1 ID */
				MX6UL_PAD_CSI_DATA07__GPIO4_IO28           0x000010B0
				MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05        0x000110A0
			>;
		};
				pinctrl_sii902x: hdmigrp {
				fsl,pins = <
						MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x59
							>;
			};
				pinctrl_touchscreen_int: lcdif_tsc_int {
				fsl,pins = <
						MX6UL_PAD_GPIO1_IO05__GPIO1_IO05 0x000010B0
							>;
                        };
		pinctrl_enet1: enet1grp {
			fsl,pins = <
			>;
		};

		pinctrl_enet2: enet2grp {
			fsl,pins = <
				MX6UL_PAD_GPIO1_IO06__ENET2_MDIO	0x1b0b0
				MX6UL_PAD_GPIO1_IO07__ENET2_MDC		0x1b0b0
				MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN	0x1b0b0
				MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER	0x1b0b0
				MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00	0x1b0b0
				MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01	0x1b0b0
				MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN	0x1b0b0
				MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00	0x1b0b0
				MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01	0x1b0b0
				MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2	0x4001b031
				MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN	0x1b0b0
				MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER	0x1b0b0
				MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00	0x1b0b0
				MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01	0x1b0b0
				MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN	0x1b0b0
				MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00	0x1b0b0
				MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01	0x1b0b0
				MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1	0x4001b031
			>;
		};

		pinctrl_flexcan1: flexcan1grp{
			fsl,pins = <
				MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX         0x000010B0
				MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX         0x000010B0
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
				MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
				MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
				MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
			>;
		};
		pinctrl_ecspi3: ecspi3 {              
		            fsl,pins = <
                		MX6UL_PAD_UART2_CTS_B__ECSPI3_MOSI         0x000010B0
		                MX6UL_PAD_UART2_RTS_B__ECSPI3_MISO         0x000010B0
		                MX6UL_PAD_UART2_RX_DATA__ECSPI3_SCLK       0x000010B0
                		//MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0        0x000010B0
				 MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20        0x000010B0
				MX6UL_PAD_GPIO1_IO01__GPIO1_IO01           0x000010B0
			>;
		};
		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX   0x1b0b1
				MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX   0x1b0b1
			>;
		};
		
		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
				MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
			>;
		};
		pinctrl_sai2: sai2grp {
			fsl,pins = <
				MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK	0x17088
				MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC	0x17088
				MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA	0x11088
				MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA	0x11088
				MX6UL_PAD_JTAG_TMS__SAI2_MCLK		0x17088
			>;
		};

		pinctrl_tsc: tscgrp {
			fsl,pins = <
				MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0xb0
				MX6UL_PAD_GPIO1_IO02__GPIO1_IO02	0xb0
				MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0xb0
				MX6UL_PAD_GPIO1_IO04__GPIO1_IO04	0xb0
			>;
		};

		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x17059
				MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x10071
				MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
				MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
				MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
				MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
			>;
		};

		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
			fsl,pins = <
				MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
				MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
				MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
				MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
				MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
				MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
			>;
		};

		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
			fsl,pins = <
				MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
				MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
				MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
				MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
				MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
				MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
				MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
				MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
				MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
				MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
			>;
		};

		pinctrl_usdhc2_8bit: usdhc2grp_8bit {
			fsl,pins = <
				MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
				MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
				MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
				MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
				MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
				MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
				MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
				MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
				MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
			>;
		};

		pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
			fsl,pins = <
				MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
				MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
				MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
				MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
				MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
				MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
				MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
				MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
				MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
			>;
		};

		pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
			fsl,pins = <
				MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
				MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
				MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
				MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
				MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
				MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
				MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
				MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
				MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
			>;
		};
		pinctrl_lcdif_dat: lcdifdatgrp {
			fsl,pins = <
				MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
				MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
				MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
				MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
				MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
				MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
				MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
				MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
				MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
				MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
				MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
				MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
				MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
				MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
				MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
				MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
				MX6UL_PAD_LCD_DATA16__LCDIF_DATA16  0x79
				MX6UL_PAD_LCD_DATA17__LCDIF_DATA17  0x79
				MX6UL_PAD_LCD_DATA18__LCDIF_DATA18  0x79
				MX6UL_PAD_LCD_DATA19__LCDIF_DATA19  0x79
				MX6UL_PAD_LCD_DATA20__LCDIF_DATA20  0x79
				MX6UL_PAD_LCD_DATA21__LCDIF_DATA21  0x79
				MX6UL_PAD_LCD_DATA22__LCDIF_DATA22  0x79
				MX6UL_PAD_LCD_DATA23__LCDIF_DATA23  0x79
			>;
		};

		pinctrl_lcdif_dat_16bits: lcdifdatgrp_16bits {
			fsl,pins = <
				MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
				MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
				MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
				MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
				MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
				MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
				MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
				MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
				MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
				MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
				MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
				MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
				MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
				MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
				MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
				MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
			>;
		};

		pinctrl_lcdif_ctrl: lcdifctrlgrp {
			fsl,pins = <
				MX6UL_PAD_LCD_CLK__LCDIF_CLK	    0x79
				MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
				MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
				MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
			>;
		};
		pinctrl_pwm1: pwm1grp {
			fsl,pins = <
				MX6UL_PAD_GPIO1_IO08__PWM1_OUT   0x110b0
			>;
		};
		pinctrl_lcdif_reset: lcdifresetgrp {
			fsl,pins = <
				MX6UL_PAD_LCD_RESET__GPIO3_IO04		0x1b0b0
			>;
		};

	};
};

&iomuxc_snvs {
	pinctrl-names = "default_snvs";
	pinctrl-0 = <&pinctrl_hog_2>;
	imx6ul-evk {
		pinctrl_hog_2: hoggrp-2 {
			fsl,pins = <
				MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09     0x1b0b0 /* enet1 reset */
				MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06     0x1b0b0 /* enet2 reset */
				MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01     0x000110A0 /*key 1*/
			>;
		};

         pinctrl_tsc_reset: tscresetgrp  {        /*!< Function assigned for the core: Cortex-A7[ca7] */
            fsl,pins = <
                MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02        0x000110A0
            >;
        };

		pinctrl_spi4: spi4grp {
			fsl,pins = <
				MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10        0x70a1
				MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11        0x70a1
				MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07      0x70a1
				MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08      0x80000000
			>;
		};

		pinctrl_leds: ledgrp {
			fsl,pins = <
			      MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03        0x000110A0
			>;
		};

		pinctrl_485_ctl: uart3_rs485 {
			fsl,pins = <
			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00     0x1b0b0
		    >;
		};
		
	};
};

&lcdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lcdif_dat
		     &pinctrl_lcdif_ctrl
		     &pinctrl_lcdif_reset>; 
	display = <&display0>;
	status = "okay";

	display0: display {
		bits-per-pixel = <24>;
		bus-width = <24>;

		display-timings {
			native-mode = <&timing0>;

			 timing0: timing0_1024x768 {
			 clock-frequency = <50000000>;
			 hactive = <1024>;
			 vactive = <600>;
			 hfront-porch = <160>;
			 hback-porch = <140>;
			 hsync-len = <20>;
			 vback-porch = <20>;
			 vfront-porch = <12>;
			 vsync-len = <3>;

			 hsync-active = <0>;
			 vsync-active = <0>;
			 de-active = <1>;
			 pixelclk-active = <0>;
			 };

		};
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pxp {
	status = "okay";
};
&ecspi3 { 
	fsl,spi-num-chipselects = <1>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	cs-gpio = <&gpio1 20 GPIO_ACTIVE_LOW>;
	status = "okay";
	spidev: icm20608@0{
		compatible = "invensense,icm20608";
		interrupt-parent = <&gpio1>;
		interrupts = <1 1>;
		spi-max-frequency = <8000000>; 
		reg = <0>; 
	}; 
};
&sai2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai2>;

	assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
			  <&clks IMX6UL_CLK_SAI2>;
	assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
	assigned-clock-rates = <0>, <12288000>;

	status = "okay";
};

&tsc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_tsc>;
	xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
	measure-delay-time = <0xfffff>;
	pre-charge-time = <0xffff>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};
&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3
		     &pinctrl_485_ctl>;
	//pinctrl-0 = <&pinctrl_uart3>;
	//fsl,rs485-gpio-txen = <&gpio5 0 GPIO_ACTIVE_HIGH>;
	rts-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	//rs485-rts-active-high;
        rs485-rx-during-tx;
        rs485-rts-delay = <100 100>;
        linux,rs485-enabled-at-boot-time;
	status = "okay";
};
&usbotg1 {
	dr_mode = "otg";
	srp-disable;
	hnp-disable;
	adp-disable;
	status = "okay";
};

&usbotg2 {
	dr_mode = "host";
	disable-over-current;
	status = "okay";
};

&usbphy1 {
	tx-d-cal = <0x5>;
};

&usbphy2 {
	tx-d-cal = <0x5>;
};

&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
	keep-power-in-suspend;
	enable-sdio-wakeup;
	bus-width = <4>;
	status = "okay";
};

&usdhc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc2_8bit>;
        bus-width = <8>;
        non-removable;
        status = "okay";
};

&wdog1 {
	status = "okay";
};