Norflash启动代码

启动代码文件

INCLUDE .\2440addr.inc

;GPB for LED 


IMPORT |Image$$ER_ROM1$$Base|   ;ROM base       抵格开始
IMPORT |Image$$ER_ROM1$$Limit|   ;ROM limit
IMPORT |Image$$RW_RAM1$$Base|   ;RW base
IMPORT |Image$$RW_RAM1$$Limit|   ;RW limit
IMPORT |Image$$RW_RAM1$$ZI$$Limit| ;ZI limit
IMPORT |Image$$RW_RAM1$$ZI$$Base|  ;ZI base


IMPORT Main
PRESERVE8
AREA RESET,CODE,READONLY ;entry point
ENTRY
    b Reset ;reset tackle func                    空格
    b blank ; b HandleUndef
    b blank ; b HandleSWI
    b blank ; b HandlePrefetchAbort
    b blank ; b HandleDataAbort
    b blank ; b HandleNotUsed
    b blank  ; b HandleIRQ    
    b blank ; b HandleFIQ
    blank ;JUST BLANK
    b blank
Reset
    ;cpu mode
    mrs r0,cpsr   ;cpsr->r0
    bic r0,r0,#0x3f   ;0b0011 1111
    orr r0,r0,#0xd3        ;0b1101 0011 |I|F|T|M4|M3|M2|M1|M0|
    msr cpsr_cxsf,r0   ;r0->cpsr     1 1 0 1  0 0 1  1


;INT disable
    ldr r0,=INTMSK                       空格
    ldr r1,=0xffffffff
    str r1,[r0]
    ldr r0,=INTSUBMSK
    ldr r1,=0x7fff
    str r1,[r0]


;watchdog
    ldr r0,=WTCON          ;WTCON    0x53000000    R0 store WTCON addr
    mov r1,#0x0 
    str r1,[r0]            ;value in r1,that is 0x0,store in the addr,that is the content in r0, make watch dog stop working


;clk setting
    ldr r0,=0x4c000014     ;CLKDIVN
    mov r1,#0x05   ;0b0000 0101
    str r1,[r0]   ;FCLK:HCLK:PCLK=1:4:8  
    mrc p15,0,r0,c1,c0,0   ;If HDIVN is not 0 and the CPU bus mode is the fast bus mode, the CPU will operate
    orr r0,r0,#0xc0000000  ;by the HCLK.This feature can be used to change the CPU frequency as a half or more
    mcr p15,0,r0,c1,c0,0   ;without affecting the HCLKand PCLK. P7-9 in s3c2440 datasheet
    ldr r0,=0x4c000004   ;MPLLCON
    ldr r1,=0x0005c011   ;0b 0101 1100 0000 0001 0001
    str r1,[r0]   ;SDIV=1 PDIV=1 MDIV=92  FCLK=400MHZ HCLK=100MHz  PCLK=50MHz


;SDRAM init
    adrl  r0,SMRDATA   ;you should re-ensure the parameter of the SDRAM
    ldmia r0,{r1-r13}
    ldr   r0,=BWSCON
    stmia r0,{r1-r13}
;set sp
    ldr sp,=0x32fff000


;LED1 light
    LDR r0,=GPBCON
    LDR r1,=0x400
    STR r1,[r0]

    ldr r0,=GPBUP
    ldr r1,=0x0
    str r1,[r0]


    ldr r0,=GPBDAT
    ldr r1,=0x3df  ;ob11 1101 1111


;light LED1 continuous


    ldr r0,=0x2ffff ;2FFFF ;Set LED light time
delay 
    sub r0,r0,#1                ;r0=r0-1             
     cmp r0,#0x0                 ;将r0的值与0相比较 
    bne delay                 ;比较的结果不为0（r0不为0），继续调用delay,否则执行下一条语句 


;copy program to SDRAM
;RO
    adr r0,ENTRY
    ldr r2,BaseOfROM
    ldr r3,TopOfROM
0
    ldmia r0!,{r4-r7}
    stmia r2!,{r4-r7}
    cmp r2,r3
    bcc %b0


;RW
    sub r2,r2,r3   
    sub r0,r0,r2


    ldr r2,BaseOfBSS
    ldr r3,BaseOfZI
1
    cmp r2,r3
    ldrcc r1,[r0],#4
    strcc r1,[r2],#4
    bcc %b1


;ZI
    mov r0,#0x0  
    ldr r3,EndOfBSS
2
    cmp r2,r3
    strcc r0,[r2],#4
    bcc %b2


;to main
    ldr pc,=Main
;memory init value
SMRDATA
DCD 0x22011000                          ;BWCSON
DCD 0x00000700                          ;GCS0
DCD 0x00000700         ;GCS1
DCD 0x00000700                    ;GCS2
DCD 0x00000700 ;GCS3
DCD 0x00000700                   ;GCS4
DCD 0x00000700 ;GCS5
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN));GCS6
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN));GCS7
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Tsrc<<18)+REFCNT)
DCD 0XB1
DCD 0x30
DCD 0x30


;Bank 6 parameter 
B6_MT EQU 0x3 ;SDRAM 
B6_Trcd EQU 0x1 ;3clk 
B6_SCAN EQU 0x1 ;9bit 
 
;Bank 7 parameter 
B7_MT EQU 0x3 ;SDRAM 
B7_Trcd EQU 0x1 ;4clk 
B7_SCAN EQU 0x1 ;9bit
REFCNT      EQU 1268 
 
;REFRESH parameter 
REFEN EQU 0x1 ;Refresh enable 
TREFMD EQU 0x0 ;CBR(CAS before RAS)/Auto refresh 
Trp EQU 0x0 ;2clk 
Tsrc EQU 0x1 ;5clk 
 
BaseOfROM DCD |Image$$ER_ROM1$$Base|
TopOfROM  DCD |Image$$ER_ROM1$$Limit|
BaseOfBSS DCD |Image$$RW_RAM1$$Base|
BaseOfZI  DCD |Image$$RW_RAM1$$ZI$$Base|
EndOfBSS  DCD |Image$$RW_RAM1$$ZI$$Limit|

END

Keil设置如下：

地址配置文件2440addr.inc

;GPB for LED
GPBCON   EQU    0x56000010     ;GPB   LED1~LED4 coorespond GPB5~GPB8
GPBDAT   EQU    0x56000014 ;GPB
GPBUP    EQU    0x56000018 ;GPB


;memory address
BWSCON   EQU  0x48000000     ;Bus width & wait status 
BANKCON0 EQU  0x48000004     ;Boot ROM control 
BANKCON1 EQU  0x48000008     ;BANK1 control 
BANKCON2 EQU  0x4800000c     ;BANK2 control 
BANKCON3 EQU  0x48000010     ;BANK3 control 
BANKCON4 EQU  0x48000014     ;BANK4 control 
BANKCON5 EQU  0x48000018     ;BANK5 control 
BANKCON6 EQU  0x4800001c     ;BANK6 control 
BANKCON7 EQU  0x48000020     ;BANK7 control 
REFRESH EQU  0x48000024     ;DRAM/SDRAM refresh 
BANKSIZE EQU  0x48000028     ;Flexible Bank Size 
MRSRB6   EQU  0x4800002c     ;Mode register set for SDRAM Bank6 
MRSRB7   EQU  0x48000030     ;Mode register set for SDRAM Bank7 


;watch DOG
WTCON       EQU 0x53000000     ;WATCH DOG


;INT
INTMSK      EQU  0x4A000008
INTSUBMSK   EQU  0x4A00001C
END  

main函数文件

#define rGPBCON               (*(volatile unsigned long *) 0x56000010)
#define rGPBDAT               (*(volatile unsigned long *) 0x56000014)
#define rGPBUP                (*(volatile unsigned long *) 0x56000018)


int Main()
{
rGPBCON&=~((3<<10)|(3<<12));   //~110000000000=001111111111
rGPBCON |=(5<<10);   //10000000000
rGPBUP=0xff;     //~100000=011111
while(1)
{
rGPBDAT =0x0;    //100000
}
}

注意：1）指令前加空格

            2）伪操作抵格

            3）加END

            4） ldr r0,=INTMSK   //INTMSK的值赋给r0     

            5）ldr r0.=0xffff    //0xffff赋值给r0

            6） ldr pc,=Main    //main为地址，将main标示的地址赋给PC

            7） ldr r2,BaseOfROM   //将BaseOfROM在内存中的地址的存储的值赋给r2

             8）ldr伪指令和实指令的用法区别：实指令是将操作数2（如上的BaseOfROM）

                    标示的地址所存储的内容作为操作对象，伪指令则将操作数2（如上的Main）

                    本身作为操作对象。