移植u-boot到S3C2410

    最近计划将u-boot移植到我的S3C2410板子上,我的S3C2410板子上没有Norflash,只有64MNandflash,因此Bootloader是从Nandflash启动的,感觉和SMDK基本上差不多,所以vivi源码不需要任何修改,编译后就可以下载到板子上并启动,然后通过xmoden协议下载linuxroot到内存中并烧写到Nandflash中,非常方便,但是美中不足的是vivi不支持网络。Xmoden的速度慢的叫人难以忍受,一不小心就会因为校验错而前功尽弃。本人通过vivi下载并固化一个1.7Mroot足足用了45分钟。

 

如果cygwin下已经安装了arm-linux的工具链,u-boot最新的源码(1.1.3)在cygwin下就可以顺利的编译通过,具体的方法如下:

1、 u-boot/board/下新建my2410的文件夹,然后将u-boot/board/smdk2410下的所有文件拷贝到my2410中;

2、 u-boot/Makefile:1432中添加如下内容:

my2410_config: unconfig

       @./mkconfig $(@:_config=) arm arm920t my2410 NULL s3c24x0

3、 u-boot/include/configs/下新建my2410.h文件,并将u-boot/include/configs/smdk2410.h文件中的全部内容拷贝到该文件中;

4、在cygwin命令行中输入:

make my2410_config

make

即可在u-boot/下生成u-boot.bin文件。

      

       但此时的u-boot并不支持从Nandflash启动,因此需要按照vivi的启动方法对u-boot进行改造,从vivi/arch/s3c2410/head.S文件中将copy_myself代码段拷贝到u-boot/cpu/arm920t/start.S文件中,并做部分修改,修改后的部分文件内容如下所示:

 

reset:

       /*

        * set the cpu to SVC32 mode

        */

       mrs  r0,cpsr

       bic  r0,r0,#0x1f

       orr  r0,r0,#0xd3

       msr  cpsr,r0

 

/* turn off the watchdog */

#if defined(CONFIG_S3C2400)

# define pWTCON        0x15300000

# define INTMSK         0x14400008   /* Interupt-Controller base addresses */

# define CLKDIVN       0x14800014   /* clock divisor register */

#elif defined(CONFIG_S3C2410)

# define pWTCON        0x53000000

# define INTMSK         0x4A000008   /* Interupt-Controller base addresses */

# define INTSUBMSK   0x4A00001C

# define CLKDIVN       0x4C000014   /* clock divisor register */

#endif

 

#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)

       ldr     r0, =pWTCON

       mov     r1, #0x0

       str     r1, [r0]

 

       /*

        * mask all IRQs by setting all bits in the INTMR - default

        */

       mov r1, #0xffffffff

       ldr   r0, =INTMSK

       str   r1, [r0]

# if defined(CONFIG_S3C2410)

       ldr   r1, =0x3ff

       ldr   r0, =INTSUBMSK

       str   r1, [r0]

# endif

 

       /* FCLK:HCLK:PCLK = 1:2:4 */

       /* default FCLK is 120 MHz ! */

       ldr   r0, =CLKDIVN

       mov r1, #3

       str   r1, [r0]

#endif     /* CONFIG_S3C2400 || CONFIG_S3C2410 */

 

       /*

        * we do sys-critical inits only at reboot,

        * not when booting from ram!

        */

#ifndef CONFIG_SKIP_LOWLEVEL_INIT

       bl    cpu_init_crit

#endif

 

#ifndef CONFIG_SKIP_RELOCATE_UBOOT

relocate:                      /* relocate U-Boot to RAM       */

       adr  r0, _start       /* r0 <- current position of code   */

       ldr   r1, _TEXT_BASE         /* test if we run from flash or RAM */

       cmp     r0, r1                  /* don't reloc during debug         */

       beq     stack_setup

 

       ldr   r2, _armboot_start

       ldr   r3, _bss_start

       sub  r2, r3, r2       /* r2 <- size of armboot            */

       add  r2, r0, r2       /* r2 <- source end address         */

 

copy_loop:

       ldmia      r0!, {r3-r10}         /* copy from source address [r0]    */

       stmia      r1!, {r3-r10}         /* copy to   target address [r1]    */

       cmp r0, r2                    /* until source end addreee [r2]    */

       ble   copy_loop

#endif     /* CONFIG_SKIP_RELOCATE_UBOOT */

 

       /* Set up the stack                                        */

stack_setup:

       ldr   r0, _TEXT_BASE         /* upper 128 KiB: relocated uboot   */

       sub  r0, r0, #CFG_MALLOC_LEN     /* malloc area                      */

       sub  r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */

#ifdef CONFIG_USE_IRQ

       sub  r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)

#endif

       sub  sp, r0, #12            /* leave 3 words for abort-stack    */

 

clear_bss:

       ldr   r0, _bss_start        /* find start of bss segment        */

       ldr   r1, _bss_end         /* stop here                        */

       mov       r2, #0x00000000          /* clear                            */

 

clbss_l:str      r2, [r0]          /* clear loop...                    */

       add  r0, r0, #4

       cmp r0, r1

       ble   clbss_l

 

#if 0

       /* try doing this stuff after the relocation */

       ldr     r0, =pWTCON

       mov     r1, #0x0

       str     r1, [r0]

 

       /*

        * mask all IRQs by setting all bits in the INTMR - default

        */

       mov r1, #0xffffffff

       ldr   r0, =INTMR

       str   r1, [r0]

 

       /* FCLK:HCLK:PCLK = 1:2:4 */

       /* default FCLK is 120 MHz ! */

       ldr   r0, =CLKDIVN

       mov r1, #3

       str   r1, [r0]

       /* END stuff after relocation */

#endif

 

#ifdef CONFIG_S3C2410_NAND_BOOT

       bl    copy_myself

 

       @ jump to ram

       ldr   r1, =on_the_ram

       add  pc, r1, #0

       nop

       nop

1:    b     1b          @ infinite loop

 

on_the_ram:

#endif

 

       ldr   pc, _start_armboot

 

_start_armboot:    .word start_armboot

 

 

 

#ifdef CONFIG_S3C2410_NAND_BOOT

@

@ copy_myself: copy vivi to ram

@

copy_myself:

       mov r10, lr

 

       @ reset NAND

       mov r1, #NAND_CTL_BASE

       ldr   r2, =0xf830           @ initial value

       str   r2, [r1, #oNFCONF]

       ldr   r2, [r1, #oNFCONF]

       bic  r2, r2, #0x800              @ enable chip

       str   r2, [r1, #oNFCONF]

       mov r2, #0xff         @ RESET command

       strb r2, [r1, #oNFCMD]

       mov r3, #0                   @ wait

1:    add  r3, r3, #0x1

       cmp r3, #0xa

       blt   1b

2:    ldr   r2, [r1, #oNFSTAT]      @ wait ready

       tst    r2, #0x1

       beq  2b

       ldr   r2, [r1, #oNFCONF]

       orr  r2, r2, #0x800              @ disable chip

       str   r2, [r1, #oNFCONF]

 

       @ get read to call C functions (for nand_read())

       ldr   sp, DW_STACK_START       @ setup stack pointer

       mov fp, #0                    @ no previous frame, so fp=0

 

       @ copy vivi to RAM

       ldr   r0, =UBOOT_RAM_BASE

       mov     r1, #0x0

       mov r2, #0x20000

       bl    nand_read_ll

 

       tst    r0, #0x0

       beq  ok_nand_read

#ifdef CONFIG_DEBUG_LL

bad_nand_read:

       ldr   r0, STR_FAIL

       ldr   r1, SerBase

       bl    PrintWord

1:    b     1b          @ infinite loop

#endif

 

ok_nand_read:

#ifdef CONFIG_DEBUG_LL

       ldr   r0, STR_OK

       ldr   r1, SerBase

       bl    PrintWord

#endif

 

       @ verify

       mov r0, #0

       ldr   r1, =UBOOT_RAM_BASE

       mov r2, #0x400     @ 4 bytes * 1024 = 4K-bytes

go_next:

       ldr   r3, [r0], #4

       ldr   r4, [r1], #4

       teq   r3, r4

       bne  notmatch

       subs r2, r2, #4

       beq  done_nand_read

       bne  go_next

notmatch:

#ifdef CONFIG_DEBUG_LL

       sub  r0, r0, #4

       ldr   r1, SerBase

       bl    PrintHexWord

       ldr   r0, STR_FAIL

       ldr   r1, SerBase

       bl    PrintWord

#endif

1:    b     1b

done_nand_read:

 

#ifdef CONFIG_DEBUG_LL

       ldr   r0, STR_OK

       ldr   r1, SerBase

       bl    PrintWord

#endif

 

       mov pc, r10

 

@ clear memory

@ r0: start address

@ r1: length

mem_clear:

       mov r2, #0

       mov r3, r2

       mov r4, r2

       mov r5, r2

       mov r6, r2

       mov r7, r2

       mov r8, r2

       mov r9, r2

 

clear_loop:

       stmia      r0!, {r2-r9}

       subs r1, r1, #(8 * 4)

       bne  clear_loop

 

       mov pc, lr

 

#endif @ CONFIG_S3C2410_NAND_BOOT

 

       然后在文件的最后加上堆栈段的定义:

 

       .align     2

DW_STACK_START:

       .word      STACK_BASE+STACK_SIZE-4

 

       然后在u-boot/include/configs/my2410.h文件中添加如下的宏定义:

 

/*

 * Boot form Nandflash

 */

#define CONFIG_S3C2410_NAND_BOOT 1

 

#define STACK_BASE 0x33f00000

#define STACK_SIZE 0x8000

#define UBOOT_RAM_BASE 0x33f80000

 

/* NAND Flash Controller */

#define NAND_CTL_BASE         0x4E000000

#define bINT_CTL(Nb)        __REG(INT_CTL_BASE + (Nb))

/* Offset */

#define oNFCONF                     0x00

#define oNFCMD                0x04

#define oNFADDR               0x08

#define oNFDATA               0x0c

#define oNFSTAT                0x10

#define oNFECC                 0x14

 

 

       接下来将vivi/arch/s3c2410/nand_read.c文件拷贝到u-boot/cpu/arm920t/s3c24x0/文件夹下并修改u-boot/cpu/arm920t/s3c24x0/Makefile文件,在第29行的末尾添加nand_read.o

       到此,u-boot的改造工作告一段落,重新构建u-boot,生成u-boot.bin文件,然后通过Jflash下载到Nand的起始位置(Block0),重启板子,如果顺利,你就可以从超级终端中看到如下的输出:

U-Boot 1.1.3 (Nov 26 2005 - 23:39:37)

 

U-Boot code: 33F80000 -> 33F9890C  BSS: -> 33F9C9E4

RAM Configuration:

Bank #0: 30000000 64 MB

Flash: 512 kB

*** Warning - bad CRC, using default environment

 

In:    serial

Out:   serial

Err:   serial

MY2410 #

 

移植工作初见成效。

你可能感兴趣的:(工作日志)