[笔记]DE2-115 LCD1602字符的显示

顶层代码:

module lcd1602(
input CLOCK_50,
input RST_N,
inout[7:0] LCD_DATA,
output LCD_EN,
output LCD_RS,
output LCD_RW,
output LCD_ON,
output LCD_BLON
);
//initial//
wire[7:0] LCD_D_1;
wire LCD_RS_1;
wire LCD_RW_1;
wire LCD_EN_1;
wire DLY_RST;

assign LCD_DATA=LCD_D_1;
assign LCD_RS=LCD_RS_1;
assign LCD_RW=LCD_RW_1;
assign LCD_EN=LCD_EN_1;
assign LCD_ON=1'b1;
assign LCD_BLON=1'b0;

Reset_Delay r0(.iCLK(CLOCK_50),	.oRESET(DLY_RST));
LCD1602_TEST u1(	//Host Side
				.iCLK(CLOCK_50),
				.iRST_N(DLY_RST),
				//LCD Side
				.LCD_DATA(LCD_D_1),
				.LCD_RW(LCD_RW_1),
				.LCD_EN(LCD_EN_1),
				.LCD_RS(LCD_RS_1)
			);
endmodule

RST_N初始延迟代码： 

module Reset_Delay(iCLK,oRESET);
input iCLK;
output reg oRESET;
reg[19:0] Cont;

always@(posedge iCLK)
begin
	if(Cont!=20'hfffff)
		begin
			Cont<=Cont+1'b1;
			oRESET<=1'b0;
		end
	else
		oRESET<=1'b1;
end

endmodule

		

 底层代码LCD1602_TEST：

module LCD1602_TEST(
input iCLK,iRST_N,	//Host Side
output[7:0] LCD_DATA,	//LCD1602 Side
output LCD_RS,LCD_RW,LCD_EN
);
//Internal Wires/Registers
reg[5:0] LUT_INDEX;
reg[8:0] LUT_DATA;
reg[5:0] mLCD_ST;
reg[17:0] mDLY;
reg[7:0] mLCD_DATA;
reg	mLCD_Start;
reg	mLCD_RS;
wire mLCD_Done;

parameter LCD_INITIAL	=	0;
parameter LCD_LINE1		=	5;	//Just have 5 control command
parameter LCD_CH_LINE	=	LCD_LINE1+16;	//Change Line
parameter LCD_LINE2		=	LCD_LINE1+16+1;
parameter LUT_SIZE		=	LCD_LINE1+32+1;

always@(posedge iCLK or negedge iRST_N)
begin
	if(!iRST_N)
	begin
		LUT_INDEX	<=	0;
		mLCD_ST		<=	0;
		mDLY		<=	0;
		mLCD_Start	<=	0;
		mLCD_DATA	<=	0;
		mLCD_RS		<=	0;
	end
	else
	begin
		if(LUT_INDEX

底层代码LCD1602_Controller：

module LCD1602_Controller(
//Host Side
input iCLK,iRST_N,
input iRS,iStart,
input[7:0] iDATA,
output reg oDone,
//LCD1602 Interface
output[7:0] LCD_DATA,
output LCD_RS,
output LCD_RW,
output reg LCD_EN
);
//Internal Register
reg[4:0] Cont;
reg[1:0] ST;
reg preStart,mStart;
//Only write to LCD,bypass iRS to LCD_RS
assign LCD_DATA	=	iDATA;
assign LCD_RS	=	iRS;
assign LCD_RW	=	1'b0;

parameter CLK_Divide	=	16;

always@(posedge iCLK or negedge iRST_N)
begin
	if(!iRST_N)
	begin
		oDone	<=	1'b0;
		LCD_EN	<=	1'b0;
		preStart<=	1'b0;
		mStart	<=	1'b0;
		Cont	<=	0;
		ST		<=	0;
	end
	else
	begin	
	//Input Start Detect
	preStart	<=	iStart;
	if({preStart,iStart}==2'b01)
	begin
		mStart	<=	1'b1;
		oDone	<=	1'b0;
	end
	if(mStart)
	begin
		case(ST)
			0:	ST	<=	1;	//Wait Setup
			1:	begin
					LCD_EN	<=	1'b1;
					ST		<=	2;
				end
			2:	begin
					if(Cont

效果图：

转载于:https://www.cnblogs.com/spartan/archive/2011/05/26/2059311.html