Makefile build 规则

  • 了解makefile build 规则

1.Build Introduction

Build使用的一般形式为:

$(MAKE) $(build)=build_dir  [argv]
-$(build) 变量定义在 scripts/Kbuild.include文件中;  
-build_dir为可变目录和参数;
-[argv] 可选。

# scripts/Kbuild.include:
# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
# Usage:
# $(Q)$(MAKE) $(build)=dir
build := -f $(srctree)/scripts/Makefile.build obj

进行变量替换后,上述命令则为:
$(MAKE) -f scripts/Makefile.build obj=build_dir  [argv]
Note: Make进入由参数-f指定的Make文件scripts/Makefile.build,并传入参数obj=build_dir 和argv。

例如:Uboot 编译流程编译命令:

#@make -f ./scripts/Makefile.build obj=scripts/kconfig firefly-rk3399_defconfig

如上所示:
  Make进入由参数-f指定的Make文件scripts/Makefile.build,并传入参数obj=build_dir 和argv。

  • $(MAKE) = make -f (-f mean read file as a makefile)
  • $(build) = ./scripts/Makefile.build obj
  • $@ = firefly-rk3399_defconfig

  在scripts/Makefile.build的处理过程中,传入的参数$(obj) 代表此次make命令要处理(编译、链接、和生成) 文件所在的目录,如上所示为scripts/kconfig,该目录的Makefile文件会被Makefile.build包含。即$(obj)目录下的Makefile记为$(obj)/Makefile。

Makefile build 规则_第1张图片

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