Vivado pcie_can_bd.bd 代码
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本文链接：https://blog.csdn.net/qq_46621272/article/details/118249238?
PCIe TO CAN FPGA Vivado Block Design
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<bd:repository xmlns:bd="http://www.xilinx.com/bd" bd:BoundaryCRC="0x6F61C80873F099D5" bd:device="xc7a200tffg1156-2" bd:isValidated="true" bd:synthFlowMode="Hierarchical" bd:tool_version="2017.4" bd:top="pcie_can_bd" bd:version="1.00.a">
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
<spirit:vendor>xilinx.comspirit:vendor>
<spirit:library>BlockDiagramspirit:library>
<spirit:name>pcie_can_bdspirit:name>
<spirit:version>1.00.aspirit:version>
<spirit:parameters>
<spirit:parameter>
<spirit:name>isTopspirit:name>
<spirit:value spirit:format="bool" spirit:resolve="immediate">truespirit:value>
spirit:parameter>
spirit:parameters>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>pcie_refspirit:name>
<spirit:slave/>
<spirit:busType spirit:library="interface" spirit:name="diff_clock" spirit:vendor="xilinx.com" spirit:version="1.0"/>
<spirit:abstractionType spirit:library="interface" spirit:name="diff_clock_rtl" spirit:vendor="xilinx.com" spirit:version="1.0"/>
<spirit:parameters>
<spirit:parameter>
<spirit:name>CAN_DEBUGspirit:name>
<spirit:value>falsespirit:value>
<spirit:vendorExtensions>
<bd:configElementInfos>
<bd:configElementInfo bd:valueSource="default"/>
bd:configElementInfos>
spirit:vendorExtensions>
spirit:parameter>
<spirit:parameter>
<spirit:name>FREQ_HZspirit:name>
<spirit:value>100000000spirit:value>
<spirit:vendorExtensions>
<bd:configElementInfos>
<bd:configElementInfo bd:valueSource="default"/>
bd:configElementInfos>
spirit:vendorExtensions>
spirit:parameter>
spirit:parameters>
spirit:busInterface>
<spirit:busInterface>
<spirit:name>epcspirit:name>
<spirit:master/>
<spirit:busType spirit:library="interface" spirit:name="epc" spirit:vendor="xilinx.com" spirit:version="1.0"/>
<spirit:abstractionType spirit:library="interface" spirit:name="epc_rtl" spirit:vendor="xilinx.com" spirit:version="1.0"/>
spirit:busInterface>
<spirit:busInterface>
<spirit:name>pcie_mgtspirit:name>
<spirit:master/>
<spirit:busType spirit:library="interface" spirit:name="pcie_7x_mgt" spirit:vendor="xilinx.com" spirit:version="1.0"/>
<spirit:abstractionType spirit:library="interface" spirit:name="pcie_7x_mgt_rtl" spirit:vendor="xilinx.com" spirit:version="1.0"/>
spirit:busInterface>
spirit:busInterfaces>
<spirit:model>
<spirit:views>
<spirit:view>
<spirit:name>BlockDiagramspirit:name>
<spirit:envIdentifier>:vivado.xilinx.com:spirit:envIdentifier>
<spirit:hierarchyRef spirit:library="BlockDiagram" spirit:name="pcie_can_bd_imp" spirit:vendor="xilinx.com" spirit:version="1.00.a"/>
spirit:view>
spirit:views>
<spirit:ports>
<spirit:port>
<spirit:name>pcie_rst_nspirit:name>
<spirit:wire>
<spirit:direction>inspirit:direction>
spirit:wire>
spirit:port>
<spirit:port>
<spirit:name>pcie_irqspirit:name>
<spirit:wire>
<spirit:direction>inspirit:direction>
spirit:wire>
spirit:port>
<spirit:port>
<spirit:name>axi_clkspirit:name>
<spirit:wire>
<spirit:direction>outspirit:direction>
spirit:wire>
spirit:port>
<spirit:port>
<spirit:name>axi_rstnspirit:name>
<spirit:wire>
<spirit:direction>outspirit:direction>
spirit:wire>
spirit:port>
spirit:ports>
spirit:model>
spirit:component>
<spirit:design xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
<spirit:vendor>xilinx.comspirit:vendor>
<spirit:library>BlockDiagramspirit:library>
<spirit:name>pcie_can_bd_impspirit:name>
<spirit:version>1.00.aspirit:version>
<spirit:componentInstances>
<spirit:componentInstance>
<spirit:instanceName>xdma_0spirit:instanceName>
<spirit:componentRef spirit:library="ip" spirit:name="xdma" spirit:vendor="xilinx.com" spirit:version="4.0"/>
<spirit:configurableElementValues>
<spirit:configurableElementValue spirit:referenceId="bd:xciName">pcie_can_bd_xdma_0_0spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="axilite_master_en">truespirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="pf0_msi_enabled">falsespirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="cfg_mgmt_if">falsespirit:configurableElementValue>
spirit:configurableElementValues>
spirit:componentInstance>
<spirit:componentInstance>
<spirit:instanceName>axi_epc_0spirit:instanceName>
<spirit:componentRef spirit:library="ip" spirit:name="axi_epc" spirit:vendor="xilinx.com" spirit:version="2.0"/>
<spirit:configurableElementValues>
<spirit:configurableElementValue spirit:referenceId="bd:xciName">pcie_can_bd_axi_epc_0_0spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_RDY_WIDTH">50000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_RDY_TOUT">50000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_DATA_TINV">50000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_DATA_TOUT">50000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_RD_CYCLE">100000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_RDN_WIDTH">80000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_DATA_TH">10000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_DATA_TSU">10000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_WR_CYCLE">100000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_WRN_WIDTH">80000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_CSN_TH">10000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_CSN_TSU">10000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_ADS_WIDTH">10000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_ADDR_TH">10000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_ADDR_TSU">10000spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_BUS_MULTIPLEX">1spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_DWIDTH_MATCH">1spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_DWIDTH">8spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_PRH0_AWIDTH">8spirit:configurableElementValue>
spirit:configurableElementValues>
spirit:componentInstance>
<spirit:componentInstance>
<spirit:instanceName>util_ds_buf_0spirit:instanceName>
<spirit:componentRef spirit:library="ip" spirit:name="util_ds_buf" spirit:vendor="xilinx.com" spirit:version="2.1"/>
<spirit:configurableElementValues>
<spirit:configurableElementValue spirit:referenceId="bd:xciName">pcie_can_bd_util_ds_buf_0_0spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="C_BUF_TYPE">IBUFDSGTEspirit:configurableElementValue>
spirit:configurableElementValues>
spirit:componentInstance>
spirit:componentInstances>
<spirit:interconnections>
<spirit:interconnection>
<spirit:name>xdma_0_M_AXI_LITEspirit:name>
<spirit:activeInterface spirit:busRef="S_AXI" spirit:componentRef="axi_epc_0"/>
<spirit:activeInterface spirit:busRef="M_AXI_LITE" spirit:componentRef="xdma_0"/>
spirit:interconnection>
spirit:interconnections>
<spirit:adHocConnections>
<spirit:adHocConnection>
<spirit:name>pcie_rst_n_1spirit:name>
<spirit:externalPortReference spirit:portRef="pcie_rst_n"/>
<spirit:internalPortReference spirit:componentRef="xdma_0" spirit:portRef="sys_rst_n"/>
spirit:adHocConnection>
<spirit:adHocConnection>
<spirit:name>util_ds_buf_0_IBUF_OUTspirit:name>
<spirit:internalPortReference spirit:componentRef="util_ds_buf_0" spirit:portRef="IBUF_OUT"/>
<spirit:internalPortReference spirit:componentRef="xdma_0" spirit:portRef="sys_clk"/>
spirit:adHocConnection>
<spirit:adHocConnection>
<spirit:name>pcie_irq_1spirit:name>
<spirit:externalPortReference spirit:portRef="pcie_irq"/>
<spirit:internalPortReference spirit:componentRef="xdma_0" spirit:portRef="usr_irq_req"/>
spirit:adHocConnection>
<spirit:adHocConnection>
<spirit:name>xdma_0_axi_aclkspirit:name>
<spirit:internalPortReference spirit:componentRef="xdma_0" spirit:portRef="axi_aclk"/>
<spirit:externalPortReference spirit:portRef="axi_clk"/>
<spirit:internalPortReference spirit:componentRef="axi_epc_0" spirit:portRef="s_axi_aclk"/>
spirit:adHocConnection>
<spirit:adHocConnection>
<spirit:name>xdma_0_axi_aresetnspirit:name>
<spirit:internalPortReference spirit:componentRef="xdma_0" spirit:portRef="axi_aresetn"/>
<spirit:externalPortReference spirit:portRef="axi_rstn"/>
<spirit:internalPortReference spirit:componentRef="axi_epc_0" spirit:portRef="s_axi_aresetn"/>
spirit:adHocConnection>
spirit:adHocConnections>
<spirit:hierConnections>
<spirit:hierConnection spirit:interfaceRef="pcie_ref/pcie_ref_1">
<spirit:activeInterface spirit:busRef="CLK_IN_D" spirit:componentRef="util_ds_buf_0"/>
spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="epc/axi_epc_0_EPC_INTF">
<spirit:activeInterface spirit:busRef="EPC_INTF" spirit:componentRef="axi_epc_0"/>
spirit:hierConnection>
<spirit:hierConnection spirit:interfaceRef="pcie_mgt/xdma_0_pcie_mgt">
<spirit:activeInterface spirit:busRef="pcie_mgt" spirit:componentRef="xdma_0"/>
spirit:hierConnection>
spirit:hierConnections>
spirit:design>
<spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
<spirit:vendor>xilinx.comspirit:vendor>
<spirit:library>Addressing/xdma_0spirit:library>
<spirit:name>xdmaspirit:name>
<spirit:version>4.0spirit:version>
<spirit:busInterfaces>
<spirit:busInterface>
<spirit:name>M_AXIspirit:name>
<spirit:master>
<spirit:addressSpaceRef spirit:addressSpaceRef="M_AXI"/>
spirit:master>
<spirit:busType spirit:library="interface" spirit:name="aximm" spirit:vendor="xilinx.com" spirit:version="1.0"/>
<spirit:abstractionType spirit:library="interface" spirit:name="aximm_rtl" spirit:vendor="xilinx.com" spirit:version="1.0"/>
spirit:busInterface>
<spirit:busInterface>
<spirit:name>M_AXI_LITEspirit:name>
<spirit:master>
<spirit:addressSpaceRef spirit:addressSpaceRef="M_AXI_LITE"/>
spirit:master>
<spirit:busType spirit:library="interface" spirit:name="aximm" spirit:vendor="xilinx.com" spirit:version="1.0"/>
<spirit:abstractionType spirit:library="interface" spirit:name="aximm_rtl" spirit:vendor="xilinx.com" spirit:version="1.0"/>
spirit:busInterface>
spirit:busInterfaces>
<spirit:addressSpaces>
<spirit:addressSpace>
<spirit:name>M_AXIspirit:name>
<spirit:range>16Espirit:range>
<spirit:width>32spirit:width>
<spirit:segments/>
spirit:addressSpace>
<spirit:addressSpace>
<spirit:name>M_AXI_LITEspirit:name>
<spirit:range>4Gspirit:range>
<spirit:width>32spirit:width>
<spirit:segments>
<spirit:segment>
<spirit:name>SEG_axi_epc_0_PRH0spirit:name>
<spirit:displayName>/axi_epc_0/S_AXI_MEM/PRH0spirit:displayName>
<spirit:addressOffset>0x00020000spirit:addressOffset>
<spirit:range>4Kspirit:range>
spirit:segment>
spirit:segments>
spirit:addressSpace>
spirit:addressSpaces>
spirit:component>
bd:repository>
连接：采用 FPGA 实现 ＜PCIe to CAN＞ 网卡的设计 https://blog.csdn.net/qq_46621272/article/details/118242161?