[深入理解eMMC系列 (eMMC协议篇) 2] eMMC协议相关术语与定义

声明

本文根据eMMC 5.1协议和公知,结合个人经验整理。

闪存笔记的博客,付费内容,整理不易, 禁止转载,侵权联删。


内容摘要

全文3800 字,注意内容有

前言

1 常用术语和定义

2 不常用术语和定义

参考


前言

文中列出了常用和不常用的eMMC 术语, 只需要了解常用术语就完全够用, 非常用术语几乎都用不上,只要遇到的时候来查一下即可。

1 常用术语和定义

Block: A number of bytes, basic data transfer unit (若干个字节,基本的数据传输单元)


CID: Device IDentification register (设备识别寄存器)


CLK: Clock signal (时钟信号)


CMD: Command line or e•MMC bus command (if extended CMDXX) (命令行或eMMC总线命令)


Data Strobe: Return Clock signal used in HS400 mode (在HS400模式下使用的返回时钟信号)


CRC: Cyclic Redundancy Check (循环冗余码校验)


CSD: Device Specific Data register (设备特定数据寄存器)


DAT: Data line (数据传输线)


DISCARD: This command allows the host to identify regions that aren’t needed. It does not require action from the device. This is a performance command.(此命令允许主机标记不需要的区域。它不需要来自设备的操作。这是一个性能命令。)


DSR: Driver Stage Register (驱动程序阶段寄存器)


e•MMC: embedded MultiMediaCard (The Cache feature is optional and only supports a single VDDipin)

ERASE: Block erase operation which does not require actual physical NAND erase operation (不需要实际的物理NAND擦除操作的块擦除操作)
Flash: A type of multiple time programmable nonvolatile memory (闪存,一种多次可编程非易失性存储器)
 

HS200: High Speed interface timing mode of up to 200MB/s @200MHz Single Date Rate Bus, 1.8V or 1.2V IOs (高速接口timing模式,在200MHz单速率总线下,高达200MB/s,1.8V或1.2V IOs)


HS400: High Speed DDR interface timing mode of up to 400MB/s @200MHz Dual Date Rate Bus, 1.8V or 1.2V IOs (高速DDR接口定时模式高达400MB/s @200MHz双倍速率Bus,1.8V或1.2V IOs, 和HS)

Reset: CMD0 with argument of 0x00000000 or 0xF0F0F0F0, H/W reset (or CMD15) (CMD0,参数为0x00000000或0xF0F0F0F0的CMD0,H/W重置(或CMD15))

ROM: Read Only Memory (只读存贮器)


RPMB: Replay Protected Memory Block (重放受保护的内存块)

TRIM: A command which removes data from a write group. When TRIM is executed the region shall read as ‘0’. This serves primarily as a data removal command. (从写入组中删除数据的命令。当执行TRIM时,该区域应读取为“0”。这主要用于一个数据删除命令。)

Write Protection, Permanent: Write and erase prevention scheme, which once enabled, cannot be reversed. (写和删除预防方案,一旦启用,就不能逆转。)


Write Protection, Power-on: Write and erase prevention scheme, which once enabled, can only be reversed when a power failure event, that causes the device to reboot occurs, or the device is reset using the reset pin. (写入和擦除预防方案,一旦启动,只能在发生电源故障事件,导致设备重新启动,或使用复位pin管脚复位设备时才能逆转。)


Write protection, Temporary: Write and erase prevention scheme that can be enabled and disabled. (可以启用和禁用的写和擦除预防方案。)

2 不常用术语和定义

Mapped Host Address Space: (可以通过主机软件读取命令访问eMMC设备的区域。)


Private Vendor Specific Address Space:  (来自主机软件的读取命令无法访问的eMMC设备的区域。)


Unmapped Host Address Space:  (来自主机软件的读取命令无法访问的eMMC设备的区域。)

e2•MMC: An e•MMC device that supports the e•MMC Cache feature and 3 VDDi pins.(一个支持eMMC缓存特性和3个VDDi引脚的eMMC设备)

Group: A number of write blocks, composite erase and write protect unit (有多个写块、复合擦除和写保护单元)

ISI: InterSymbol Interference (referred to certain Noise type) (符号间干扰(指特定噪声类型))


LOW, HIGH: Binary interface states with defined assignment to a voltage level (二进制接口状态与定义的分配到一个电压水平, )


NSAC: Defines the worst case for the clock rate dependent factor of the data access time (定义了数据访问时间的时钟速率相关因子的最坏情况)


Non-Persistent: A part of the storage device that may lose contents after a power cycle (存储设备的一部分,在电源循环后可能会丢失内容)


MSB, LSB: Most Significant Bit or Least Significant Bit (最高有效位或者最低有效位)


OCR: Operation Conditions Register (操作条件寄存器)


open-drain: A logical interface operation mode. An external resistor or current source is used to pull the interface level to HIGH, the internal transistor pushes it to LOW (这是一种逻辑接口的操作模式。外部电阻器或电流源用于将接口电平拉到高,内部晶体管将其推到低)


payload: Net data (净数据)


push-pull: A logical interface operation mode, a complementary pair of transistors is used to push the interface level to HIGH or LOW (一种逻辑接口操作模式,使用互补对晶体管将接口电平推到高或低)


RCA: Relative Device Address register (相对设备地址寄存器)

SSO: Simultaneous Switching Output (referred as certain type of Noise) (同时切换输出(称为特定类型的噪声))


TAAC: Defines the time dependent factor of the data access time (定义数据访问时间的时间依赖因素)


three-state driver: A driver stage which has three output driver states: HIGH, LOW and high impedance (which means that the interface does not have any influence on the interface level) (具有三个输出驱动状态的驱动级:高、低和高阻抗(表示接口对接口级没有任何影响))


Tuning Process: A process commonly done by the host to find the optimal sampling point of a data input signals. The device may provide a tuning data block as specified for HS200 mode (通常由主机完成来找到数据输入信号的最佳采样点的过程。该设备可以提供为HS200模式指定的调谐数据块)


UTC: Universal time coordinated (协调通用时间)
 

参考

[1] https://blog.csdn.net/u014100559/article/details/128066597

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