HDLBits_Lemmings4

记录一下这道题的解题思路,一开始审题状态机部分很明确,主要是计数器怎么和状态机融合

先贴出最终成功的代码。

module top_module(
    input clk,
    input areset,    // Freshly brainwashed Lemmings walk left.
    input bump_left,
    input bump_right,
    input ground,
    input dig,
    output walk_left,
    output walk_right,
    output aaah,
    output digging ); 
	parameter LEFT = 3'd0, RIGHT = 3'd1, DIGL = 3'd2, DIGR = 3'd3, AHL = 3'd4, AHR = 3'd5, SPLAT = 3'd6;
    reg [3:0] STATE, NEXT_STATE;
    reg [4:0]count1;
    reg splatter;
    always @ (*) begin
        case(STATE)
            LEFT:NEXT_STATE = ground ? (dig ? DIGL : (bump_left ? RIGHT : LEFT)	): AHL;
            RIGHT: NEXT_STATE = ground ?(dig ? DIGR :(bump_right ? LEFT : RIGHT)) :AHR;
            DIGL: NEXT_STATE = ground ? DIGL : AHL;
            DIGR: NEXT_STATE = ground ? DIGR : AHR;
            AHL: NEXT_STATE = ground ? 

你可能感兴趣的:(fpga开发)