GL3510创维一路进四路出HUB芯片方案,扩展坞方案,资源

GL3510创维一路进四路出HUB芯片方案,扩展坞方案,资源_第1张图片

GL3510创维一路进四路出HUB芯片方案,扩展坞方案,资源_第2张图片

创维的GL3510是一款与VL817相同的一出四HUB芯片

Genesys GL3510 is a 4-port, low-power, and configurable hub controller. It is compliant with the USB 3.1

specification. GL3510 integrates Genesys Logic self-developed USB 3.1 Gen 1 Super Speed transmitter/receiver

physical layer (PHY) and USB 2.0 High-Speed PHY. It supports Super Speed, Hi-Speed, and Full-Speed USB

connections and is fully backward compatible to all USB 2.0 and USB 1.1 hosts. GL3510 has built-in 5V to

3.3V and 5V to 1.2V regulators, which saves customers’ BOM cost, and eases for PCB design.

GL3510 features the native fast-charging and complies with USB-IF battery charging specification rev1.2, it

could fast-charge Apple, Samsung Galaxy devices, and any device complaint with BC1.2/1.1. It also allows

portable devices to draw up to 1.5A from GL3510 charging downstream ports (CDP1

) or dedicated charging port

(DCP2

). It can enable systems to fast charge handheld devices even during “Sleep” and “Power-off” modes.

All available packages for GL3510 are listed as the following tables.

Product Series Package Type

Number of

DFPs Power Mgmt. LED Support

GL3510 QFN 64 4 Gang Mode PGANG LED

*Note: TT (transaction translator) implements the control logic defined in Section 11.14 ~ 11.22 of USB

specification revision 2.0. TT basically handles the unbalanced traffic speed between the USPORT (operating in

HS) and DSPORTS (operating in FS/LS) of hub.

Genesys GL 3510是一个4端口、低功耗和可配置的集线器控制器.它与USB3.1兼容

规格说明。GL 3510集成Genesys逻辑公司自行开发的USB3.1GE1超高速发射机/接收器

物理层(PHY)和USB2.0高速物理层.它支持超高速、高速和全速usb。

连接,并完全向后兼容所有USB2.0和USB1.1主机。GL 3510内置了5V到

3.3V和5V~1.2V调整器,节省了客户的BOM成本,简化了PCB设计。

GL 3510的特点是本机快速充电,并符合USB-if电池充电规范Rev1.2

可以快速充电苹果,三星银河设备,以及任何设备投诉BC1.2/1.1。它也允许

便携式设备从GL3510充电下游端口(CDP 1)到1.5A

)或专用充电端口

(DCP 2)

)中选择所需的构件。它可以使系统快速充电的手持设备,甚至在“睡眠”和“断电”模式。

GL3510的所有可用软件包如下表所示。

产品系列包装类型

数目

DFPS电源管理LED支撑

GL3510QFN 64 4齿轮型PGANG LED

*注:TT(Transaction Translator)实现USB第11.14~11.22节中定义的控制逻辑。

规范修订2.0。TT基本上处理USPORT之间的不平衡交通速度(在

Hs)和DSPORTS(在集线器的FS/LS中运行)。

CHAPTER 2 FEATURES

Compliant with USB 3.1 Gen 1 Specification

- Upstream port supports SuperSpeed (SS), HighSpeed (HS) and FullSpeed (FS) traffic

- Downstream ports support SS, HS, FS, and LowSpeed (LS) traffic

- 1 control pipe and 1 interrupt pipe

- Backward compatible to USB specification Revision 2.0/1.1

Featuring fast-charging on all downstream ports and upstream port

- Compliant with USB Battery Charging Revision v1.2, supporting CDP, DCP, and ACA-Dock

- Downstream ports can be turned from a Standard Downstream Port (SDP) into Charging Downstream

Port (CDP) or Dedicated Charging Port (DCP)

- Downstream devices can be charged while upstream VBUS is not present, which can be applied on wall

charger applications

- Upstream port is capable of charging and data communicating simultaneously for portable devices

supporting ACA-Dock or proprietary charging protocols

- Supporting Apple 1A/2.1A/2.4A and Samsung Galaxy devices fast-charging

On-chip 8-bit micro-processor

- RISC-like architecture

- USB optimized instruction set

- 1 cycle instruction execution (maximum)

- Performance: 12 MIPS @ 12.5MHz (maximum)

- With 256-byte RAM, 20K-byte internal ROM, and 24K-byte SRAM

Single Transaction Translator (TT) architecture

Advanced power management and low power consumption

- Supporting USB 3.1 U0/U1/U2/U3 power management states

- Supporting USB Link Power Management (LPM) L0/L1/L2

- Supporting individual/gang mode over-current detection for all downstream ports - Supporting low active power switche

Configurable settings by EEPROM

- Configurable charging port

- Supporting configuration and customized VID/PID by EEPROM

- Supporting compound-device (non-removable setting on downstream ports)

Flexible design

- Supporting Poly-fuse/Power-switch

- Automatic switching between self-powered and bus-powered modes

- Supporting electrical tuning for each specific port

- Allow downstream ports to connect up to 8 devices, 4 x USB3.1 non-removable devices with 4 x

USB2.0 non-removable

第2章 特点

符合 USB 3.1 第 1 代规范

- 上游端口支持超高速 (SS)、高速 (HS) 和全速 (FS) 流量

- 下游端口支持 SS、HS、FS 和低速 (LS) 流量

- 1根控制管和1根中断管

- 向后兼容 USB 规范修订版 2.0/1.1

在所有下行端口和上行端口上具有快速充电功能

- 符合 USB 电池充电修订版 v1.2,支持 CDP、DCP 和 ACA 坞站

- 下行端口可以从标准下行端口(SDP)转换为充电下行端口

端口 (CDP) 或专用充电端口 (DCP)

- 下游设备可以在上游VBUS不存在时充电,这可以应用于墙上

充电器应用

- 上游端口能够为便携式设备同时充电和数据通信

支持 ACA-Dock 或专有充电协议

- 支持苹果1A / 2.1A / 2.4A和三星Galaxy设备快速充电

片上8位微处理器

- 类似RISC的架构

- USB优化指令集

- 1周期指令执行(最大)

- 性能:12 MIPS @ 12.5MHz(最大值)

- 配备 256 字节 RAM、20K 字节内部 ROM 和 24K 字节 SRAM

单事务转换器 (TT) 体系结构

先进的电源管理和低功耗

- 支持 USB 3.1 U0/U1/U2/U3 电源管理状态

- 支持 USB 链路电源管理 (LPM) L0/L1/L2

- 支持所有下游端口的单/成组模式过流检测 - 支持低有源功率开关

可通过 EEPROM 配置设置

- 可配置的充电端口

- 通过EEPROM支持配置和自定义VID / PID

- 支持复合设备(下游端口上的不可移动设置)

灵活的设计

- 支持多熔断器/电源开关

- 在自供电和总线供电模式之间自动切换

- 支持每个特定端口的电气调谐

- 允许下行端口连接多达8个设备,4个USB3。1 个不可移动设备,具有 4 个 x

USB2.0 不可拆卸

CHAPTER 2 FEATURES

Compliant with USB 3.1 Gen 1 Specification

- Upstream port supports SuperSpeed (SS), HighSpeed (HS) and FullSpeed (FS) traffic

- Downstream ports support SS, HS, FS, and LowSpeed (LS) traffic

- 1 control pipe and 1 interrupt pipe

- Backward compatible to USB specification Revision 2.0/1.1

Featuring fast-charging on all downstream ports and upstream port

- Compliant with USB Battery Charging Revision v1.2, supporting CDP, DCP, and ACA-Dock

- Downstream ports can be turned from a Standard Downstream Port (SDP) into Charging Downstream

Port (CDP) or Dedicated Charging Port (DCP)

- Downstream devices can be charged while upstream VBUS is not present, which can be applied on wall

charger applications

- Upstream port is capable of charging and data communicating simultaneously for portable devices

supporting ACA-Dock or proprietary charging protocols

- Supporting Apple 1A/2.1A/2.4A and Samsung Galaxy devices fast-charging

On-chip 8-bit micro-processor

- RISC-like architecture

- USB optimized instruction set

- 1 cycle instruction execution (maximum)

- Performance: 12 MIPS @ 12.5MHz (maximum)

- With 256-byte RAM, 20K-byte internal ROM, and 24K-byte SRAM

Single Transaction Translator (TT) architecture

Advanced power management and low power consumption

- Supporting USB 3.1 U0/U1/U2/U3 power management states

- Supporting USB Link Power Management (LPM) L0/L1/L2

- Supporting individual/gang mode over-current detection for all downstream ports - Supporting low active power switche

Configurable settings by EEPROM

- Configurable charging port

- Supporting configuration and customized VID/PID by EEPROM

- Supporting compound-device (non-removable setting on downstream ports)

Flexible design

- Supporting Poly-fuse/Power-switch

- Automatic switching between self-powered and bus-powered modes

- Supporting electrical tuning for each specific port

- Allow downstream ports to connect up to 8 devices, 4 x USB3.1 non-removable devices with 4 x

USB2.0 non-removable

第2章 特点

符合 USB 3.1 第 1 代规范

- 上游端口支持超高速 (SS)、高速 (HS) 和全速 (FS) 流量

- 下游端口支持 SS、HS、FS 和低速 (LS) 流量

- 1根控制管和1根中断管

- 向后兼容 USB 规范修订版 2.0/1.1

在所有下行端口和上行端口上具有快速充电功能

- 符合 USB 电池充电修订版 v1.2,支持 CDP、DCP 和 ACA 坞站

- 下行端口可以从标准下行端口(SDP)转换为充电下行端口

端口 (CDP) 或专用充电端口 (DCP)

- 下游设备可以在上游VBUS不存在时充电,这可以应用于墙上

充电器应用

- 上游端口能够为便携式设备同时充电和数据通信

支持 ACA-Dock 或专有充电协议

- 支持苹果1A / 2.1A / 2.4A和三星Galaxy设备快速充电

片上8位微处理器

- 类似RISC的架构

- USB优化指令集

- 1周期指令执行(最大)

- 性能:12 MIPS @ 12.5MHz(最大值)

- 配备 256 字节 RAM、20K 字节内部 ROM 和 24K 字节 SRAM

单事务转换器 (TT) 体系结构

先进的电源管理和低功耗

- 支持 USB 3.1 U0/U1/U2/U3 电源管理状态

- 支持 USB 链路电源管理 (LPM) L0/L1/L2

- 支持所有下游端口的单/成组模式过流检测 - 支持低有源功率开关

可通过 EEPROM 配置设置

- 可配置的充电端口

- 通过EEPROM支持配置和自定义VID / PID

- 支持复合设备(下游端口上的不可移动设置)

灵活的设计

- 支持多熔断器/电源开关

- 在自供电和总线供电模式之间自动切换

- 支持每个特定端口的电气调谐

- 允许下行端口连接多达8个设备,4个USB3。1 个不可移动设备,具有 4 个 x

USB2.0 不可拆卸

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