Verilog刷题笔记8

题目：

This problem is similar to the previous one (module). You are given a module named that has 2 outputs and 4 inputs, in that order. You must connect the 6 ports by position to your top-level module’s ports , , , , , and , in that order. mod_aout1out2abcd You are given the following module: module mod_a ( output, output, input, input, input, input );

我的解法：

module top_module ( 
    input a, 
    input b, 
    input c,
    input d,
    output out1,
    output out2
);
    mod_a mod_a1 ( out1,out2,a, b, c,d );
endmodule

结果正确：