msp430g2533之iic（硬件iic）

#include
#include
unsigned int RxByteCtr;
unsigned int RxWord;
volatile int j;
float temp;


void UART0_send_byte(unsigned char data)
{
for( j=10000;j>0;j--);
UCA0TXBUF=data;
}


void UART0_send_str(char *s)
{
    while(*s != '\0')
    {
        UART0_send_byte(*s++);
    }
}


void UART0()
{
DCOCTL = 0;                               // Select lowest DCOx and MODx settings
BCSCTL1 = CALBC1_1MHZ;                    // Set DCO
DCOCTL = CALDCO_1MHZ;
P1SEL |= BIT1 + BIT2 ;                    // P1.1 = RXD, P1.2=TXD
P1SEL2 |= BIT1 + BIT2 ;                   // P1.1 = RXD, P1.2=TXD
UCA0CTL1 |= UCSSEL_2;                     // SMCLK
UCA0BR0 = 104;                            // 1MHz 9600
UCA0BR1 = 0;                              // 1MHz 9600
UCA0MCTL = UCBRS0;                        // Modulation UCBRSx = 1
UCA0CTL1 &= ~UCSWRST;                     // **Initialize USCI state machine**
}




void IIC()
{


P1SEL |= BIT6 + BIT7;                  // Assign I2C pins to USCI_B0
P1SEL2|= BIT6 + BIT7;                  // Assign I2C pins to USCI_B0
UCB0CTL1 |= UCSWRST;                   // Enable SW reset
UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;  // I2C Master, synchronous mode
UCB0CTL1 = UCSSEL_2 + UCSWRST;         // Use SMCLK, keep SW reset
UCB0BR0 = 12;                          // fSCL = SMCLK/12 = ~100kHz
UCB0BR1 = 0;
UCB0I2CSA = 0x48;                      // Set slave address
UCB0CTL1 &= ~UCSWRST;                  // Clear SW reset, resume operation
IE2 |= UCB0RXIE;                       // Enable RX interrupt
TACTL = TASSEL_2 + MC_2;              // SMCLK, contmode
}






int main(void)
{
char buf[10];
    WDTCTL = WDTPW + WDTHOLD;


    if (CALBC1_1MHZ==0xFF) // If calibration constant erased
      {
        while(1);                          // do not load, trap CPU!!
      }
    IIC();
    UART0();
while (1)
{
RxByteCtr = 2;                   // Load RX byte counter
UCB0CTL1 |= UCTXSTT;             // I2C start condition
__bis_SR_register(CPUOFF + GIE); // Enter LPM0, enable interrupts
                                     // Remain in LPM0 until all data
                                     // is RX'
    temp=(float)RxWord/256;
sprintf(buf,"%f\n",temp);
UART0_send_str(buf);


__disable_interrupt();
TACCTL0 |= CCIE;                      // TACCR0 interrupt enabled
__bis_SR_register(CPUOFF + GIE);      // Enter LPM0, enable interrupts
                                          // Remain in LPM0 until TACCR0
                                         // interrupt occurs
TACCTL0 &= ~CCIE;                   // TACCR0 interrupt disabled
}
}


#pragma vector = TIMER0_A0_VECTOR
__interrupt void TA0_ISR(void)
{
__bic_SR_register_on_exit(CPUOFF); // Exit LPM0
}


// The USCIAB0TX_ISR is structured such that it can be used to receive any
// 2+ number of bytes by pre-loading RxByteCtr with the byte count.
#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCIAB0TX_ISR(void)
{
RxByteCtr--;          // Decrement RX byte counter


if (RxByteCtr)
{
RxWord = (unsigned int)UCB0RXBUF << 8; // Get received byte
if (RxByteCtr == 1)                       // Only one byte left?
UCB0CTL1 |= UCTXSTP;                 // Generate I2C stop condition
}
else
{
RxWord |= UCB0RXBUF;                 // Get final received byte,
// Combine MSB and LSB
__bic_SR_register_on_exit(CPUOFF); // Exit LPM0
}
}