UBOOT之DDR2内存移植相关修改简记

环境：S5PC100+android（UBOOT 1.3.4）

DDR2 256MB 

 

由于DDR2相对于mobile ddR的低功耗优势，加上产品本身对功耗要求较高，所以需要使用DD2代替MOBILE DDR；

从/board/samsung/smdkc100下的UBOOT链表u-boot.LDS

 

.text : { cpu/s5pc1xx/start.o (.text) cpu/s5pc1xx/s5pc100/cpu_init.o (.text) board/samsung/smdkc100/lowlevel_init.o (.text) cpu/s5pc1xx/onenand_cp.o (.text) cpu/s5pc1xx/nand_cp.o (.text) cpu/s5pc1xx/movi.o (.text) *(.text) }

可以知道UBOOT整个工作流程，很清晰。我们要做的应该是修改内存部分相关配置；

从START.S中

 /*
  * Go setup Memory and board specific bits prior to relocation.
  */

 ldr sp, =0xd0036000 /* end of sram dedicated to u-boot */
 sub sp, sp, #12 /* set stack */
 mov fp, #0
 
 bl lowlevel_init /* go setup pll,mux,memory */

以及lowlevel_init .S中

/* when we already run in ram, we don't need to relocate U-Boot.
  * and actually, memory controller must be configured before U-Boot
  * is running in ram.
  */
 ldr r0, =0xff000fff
 bic r1, pc, r0  /* r0 <- current base addr of code */
 ldr r2, _TEXT_BASE  /* r1 <- original base addr in ram */
 bic r2, r2, r0  /* r0 <- current base addr of code */
 cmp     r1, r2                  /* compare r0, r1                  */
 beq     1f   /* r0 == r1 then skip sdram init   */

 /* init system clock */
 bl system_clock_init
 
 bl mem_ctrl_asm_init知道内存相关配置在CPU_INIT.S中，好吧，不罗嗦了。直接贴上配置：

 

step1:

/************ DLL initialization *************/ // ldr r1, =0x6A101000 @ Phycontrol0 DLL parameter setting ldr r1, =0x50101008 //added by S str r1, [r0, #DMC_PHYCONTROL0] //ldr r1, =0x000000F4 //added by S ldr r1, =0x000000F6 //added by S the last bit is 6 for ddr21 str r1, [r0, #DMC_PHYCONTROL1] // ldr r1, =0x00000000 @Phycontrol2 DLL parameter setting ldr r1, =0x00000000 //added by S str r1, [r0, #DMC_PHYCONTROL2] // ldr r1, =0x6A101002 @DLL on ldr r1, =0x5010100a //added by S str r1, [r0, #DMC_PHYCONTROL0] // ldr r1, =0x6A101003 @Dll start ldr r1, =0x5010100b //added by S str r1, [r0, #DMC_PHYCONTROL0] ldr r2, = 0xE6000040 @DMC_PHYSTATUS0 loop1: ldr r1, [r2] @Check DLL lock ands r1, r1, #4 beq loop1 ldr r1, [r2] mov r1, r1, LSR #(0x6) and r1, r1, #(0xff) mov r1, r1, LSL #(0x18) ldr r2, = 0xE6000018 @DMC_PHYCONTROL0 ldr r3, [r2] bic r3, r3, #(0xff000000) orr r1, r3, r2 str r1, [r2] // ldr r1, =0x6A101003 @Force Value locking ldr r1, =0x5010100b //added by S str r1, [r0, #DMC_PHYCONTROL0] // ldr r1, =0x6A101009 @Dll off ldr r1, =0x50101009 //added by S str r1, [r0, #DMC_PHYCONTROL0] #if 0 ldr r1, =0x6A101000 @ Phycontrol0 DLL parameter setting str r1, [r0, #DMC_PHYCONTROL0] ldr r1, =0x00008484 @Phycontrol1 DLL parameter setting str r1, [r0, #DMC_PHYCONTROL1] ldr r1, =0x00000000 @Phycontrol2 DLL parameter setting str r1, [r0, #DMC_PHYCONTROL2] #endif /************ DLL initialization - END *************/

step1中需要注意的是:对于DDR2，手册上说明PHYCONTROL1后最后3位为0X110；

 

 

step2:

//ldr r1, =0x0FF01010 @auto refresh off ldr r1, =0x0FF01010 //added S str r1, [r0, #DMC_CONCONTROL] //ldr r1, =0x00102100 ldr r1, =0x00212400 //added by S str r1, [r0, #DMC_MEMCONTROL] ldr r1, =0x20f00313 //1CS 256MB0 str r1, [r0, #DMC_MEMCONFIG0] ldr r1, =0x40f00313 //added by S str r1, [r0, #DMC_MEMCONFIG1] ldr r1, =0x20000000 str r1, [r0, #DMC_PRECHCONFIG] ldr r1, =0x00100004 @ PwrdnConfig str r1, [r0, #DMC_PWRDNCONFIG

 

step2中需要注意的是：对于DDR2 与S5PC100来说 需要注意的是要与实际内存电路设计相关，我是32bit 两片内存并联，所以DDR2 对应一个CS为256MB，所以对于DMC_MEMCONFIG0来说chip_mask为f0;如果这里为f8则出现，UBOOT引导内核后，在内核的内存配置部分死掉等现象；

 

还有个部分：

 

 

对于这里的设置是否真的能影响功耗，这个还有待测试。

 

step3:

/************ Timing Optimization *************/ /************ DDR2_166MHz *************/// // 7.8us*166MHz=0x50e ldr r1, =0x0000050E str r1, [r0, #DMC_TIMINGAREF] ldr r1, =0x16233288 //added bu S str r1, [r0, #DMC_TIMINGROW] ldr r1, =0x23250304 @Timing Data //added bu S str r1, [r0, #DMC_TIMINGDATA] ldr r1, =0x06c80232 @ Timing Power !!!!!!!!!!!!!!! str r1, [r0, #DMC_TIMINGPOWER]

这部分是要根据你的内存时序来设置的，与其他BOOT内存时序配置类似.

 

step4:

/* Direct Command for LPDDR - *///added by S 2010.9.16 /* chip0*/ ldr r1, =0x07000000 @chip0 Deselect str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x01000000 @chip0 PALL str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00020000 @ chip0 EMRS2 str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00030000 @ chip0 EMRS3 str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00010400 @ EMRS1 (MEM DLL on, DQS# disable) str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00000552 @ chip0 MRS (MEM DLL reset) str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x01000000 @ chip0 chip0 PALL str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x05000000 @ chip0 chip0 REFA str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x05000000 @ chip0 chip0 REFA str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00000452 @ chip0 MRS (MEM DLL unreset), BL=4,CL=5 str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00010780 @ chip0 EMRS1 (OCD default) str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00010400 @ chip0 EMRS1 (OCD exit) str r1, [r0, #DMC_DIRECTCMD] /* chip1*/ ldr r1, =0x07100000 @DirectCmd chip1 Deselect str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x01100000 @DirectCmd chip1 PALL str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00120000 @DirectCmd chip1 EMRS2 str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00130000 @DirectCmd chip1 EMRS3 str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00110440 @DirectCmd chip1 EMRS1 (MEM DLL on, DQS# disable) str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00100552 @DirectCmd chip1 MRS (MEM DLL reset) CL=5, BL=4 str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x01100000 @DirectCmd chip1 PALL str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x05100000 @DirectCmd chip1 REFA str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x05100000 @DirectCmd chip1 REFA str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00100452 @DirectCmd chip1 MRS (MEM DLL unreset) str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00110780 @DirectCmd chip1 EMRS1 (OCD default) str r1, [r0, #DMC_DIRECTCMD] ldr r1, =0x00110400 @DirectCmd chip1 EMRS1 (OCD exit) str r1, [r0, #DMC_DIRECTCMD] /***************************end**********************************

既然前面用到了两个片选则，对两个片选的配置。

 

step5： Start the DMC.

// [ 5. Start the DMC.]//added by S ldr r1, =0x0FF020B0 //change S @ConControl auto refresh on str r1, [r0, #DMC_CONCONTROL] #if 0 ldr r1, =0x001000FF @ PwrdnConfig str r1, [r0, #DMC_PWRDNCONFIG] #endif ldr r1, =0x00212413 //change S @ MemControl str r1, [r0, #DMC_MEMCONTROL] b exit_cpu_init

 

启动DMC

 

到这里这个流程基本结束了，因为没用ONENAND 所以着部分不用关注暂时

 

经过测试UBOOT能正常引导整个内核以及文件系统。

 

不过有个疑问：

我是8个BANKS，但是我选2个chips没有问题哦暂时，改成0X00貌似也一样。。这里有点晕忽~

留点疑问吧~等后面再侃侃~