1,下载最新的内核
2,将 arch/arm/mach-s3c64xx/下的,mach-smdk6410.c cp为 mach-my6410.c; 修改里面的内容
/* linux/arch/arm/mach-s3c64xx/mach-my6410.c * * Copyright 2010 Darius Augulis <[email protected]> * Copyright 2008 Openmoko, Inc. * Copyright 2008 Simtec Electronics * Ben Dooks <[email protected]> * http://armlinux.simtec.co.uk/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * */ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/fb.h> #include <linux/gpio.h> #include <linux/kernel.h> #include <linux/list.h> #include <linux/dm9000.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/platform_device.h> #include <linux/serial_core.h> #include <linux/types.h> #include <asm/hardware/vic.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <mach/map.h> #include <mach/regs-gpio.h> #include <mach/regs-modem.h> #include <mach/regs-srom.h> #include <plat/adc.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/fb.h> #include <plat/nand.h> #include <plat/regs-serial.h> #include <plat/ts.h> #include <plat/regs-fb-v4.h> #include <video/platform_lcd.h> #include "common.h" #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) static struct s3c2410_uartcfg my6410_uartcfgs[] __initdata = { [0] = { .hwport = 0, .flags = 0, .ucon = UCON, .ulcon = ULCON, .ufcon = UFCON, }, [1] = { .hwport = 1, .flags = 0, .ucon = UCON, .ulcon = ULCON, .ufcon = UFCON, }, [2] = { .hwport = 2, .flags = 0, .ucon = UCON, .ulcon = ULCON, .ufcon = UFCON, }, [3] = { .hwport = 3, .flags = 0, .ucon = UCON, .ulcon = ULCON, .ufcon = UFCON, }, }; static struct platform_device *my6410_devices[] __initdata = { }; static struct map_desc my6410_iodesc[] = {}; static void __init my6410_map_io(void) { s3c64xx_init_io(my6410_iodesc, ARRAY_SIZE(my6410_iodesc)); s3c24xx_init_clocks(12000000); s3c24xx_init_uarts(my6410_uartcfgs, ARRAY_SIZE(my6410_uartcfgs)); } static void __init my6410_machine_init(void) { platform_add_devices(my6410_devices, ARRAY_SIZE(my6410_devices)); } MACHINE_START(MY6410, "MY6410") /* Maintainer: Darius Augulis <[email protected]> */ .atag_offset = 0x100, .init_irq = s3c6410_init_irq, .handle_irq = vic_handle_irq, .map_io = my6410_map_io, .init_machine = my6410_machine_init, .init_late = s3c64xx_init_late, .timer = &s3c24xx_timer, .restart = s3c64xx_restart, MACHINE_END
config MACH_MY6410 bool "MY6410" select CPU_S3C6410 help Machine support for the CoreWind MY6410
obj-$(CONFIG_MACH_MY6410) += mach-my6410.o
5. 打开 arch/arm/tools/mach-types文件,这里面存的是机器 ID必须要和,uboot 里面的ID 保持一致,将其283行复制添加在后面并修改为:
smdk6410 MACH_SMDK6410 SMDK6410 1626
xx6410 MACH_XX6410 XX6410 1626 这个机器ID和UBOOT 里的机
器ID相同时才能启动内核;
5. 修改顶层的 Makefile:
ARCH ?= arm
CROSS_COMPILE ?= arm-linux-
6. 复制 arch/arm/configs/下的s3c6400-defconfig 文件,然后将其保存为.config;
7,配置内核
现在下下载一个库
sudo apt-get install ncurses-dev
s3c6400里面内核已经配置已经够好了,这里只需要把板子改成自己的板子
System Type --->
│ ┌─────────────────────────────────────────────────────────────────────┐ │
│ │ [*] MMU-based Paged Memory Management Support │ │
│ │ ARM system type (Samsung S3C64XX) ---> │ │
│ │ *** Boot options *** │ │
│ │ [*] S3C Reboot on decompression error │ │
│ │ [*] Force UART FIFO on during boot process │ │
│ │ (0) S3C UART to use for low-level messages │ │
│ │ (0) Number of additional GPIO pins │ │
│ │ (0) Space between gpio banks │ │
│ │ [ ] ADC common driver support │ │
│ │ [ ] PWM device support │ │
│ │ *** Power management *** │ │
│ │ [ ] S3C2410 PM Suspend debug │ │
│ │ [ ] S3C2410 PM Suspend Memory CRC │ │
│ │ *** Power Domain *** │ │
│ │ -*- S3C64XX DMA │ │
│ │ [ ] SMDK6400 │ │
│ │ [ ] A&W6410 │ │
│ │ [ ] MINI6410 │ │
│ │ [ ] REAL6410 │ │
│ │ [*] MY6410 │ │
│ │ [ ] SMDK6410 │ │
│ │ [ ] NCP │ │
│ │ [ ] Airgoo HMT │ │
│ │ [ ] SmartQ 5 │ │
│ │ [ ] SmartQ 7 │ │
│ │ [ ] Wolfson Cragganmore 6410 │ │
│ │ *** Processor Type *** │ │
│ │ *** Processor Features *** │ │
│ │ [*] Support Thumb user binaries │ │
│ │ [ ] Disable I-Cache (I-bit) │ │
│ │ [ ] Disable D-Cache (C-bit) │ │
│ │ [ ] Disable branch prediction │ │
│ │ [*] Use non-cacheable memory for DMA │ │
│ │ [ ] ARM errata: FSR write bit incorrect on a SWP to read-only mem│ │
│ │ [ ] ARM errata: Invalidation of the Instruction Cache operation c│ │
│ │ [ ] ARM errata: Possible cache data corruption with hit-under-mis
然后再在General setup下添加交叉编译器
8,把u-boot源码tools目录下的mkimage拷贝到/user/bin目录下
执行 make uImage
生成的uIamge在arm/arrn/boot下
9,然后再板子的u-boot模式下执行tftp c0008000 uImage至于怎么搭建tftp就要看我之前的文章了
启动信息如下:
SMDK6410 # tftp c0008000 uImage
Found DM9000 ID:90000a46 at address 18000300 !
DM9000 work in 16 bus width
bd->bi_entaddr: 00:40:5c:26:0a:5b
[eth_init]MAC:0:40:5c:26:a:5b:
TFTP from server 192.168.1.103; our IP address is 192.168.1.101
Filename 'uImage'.
Load address: 0xc0008000
Loading: T #################################################################
#################################################################
#################################################################
#################################################################
###################################################
done
Bytes transferred = 1590368 (184460 hex)
SMDK6410 # bootm c0008000
## Booting image at c0008000 ...
Image Name: Linux-3.5.4 (最新的版本号)
Created: 2012-09-18 4:03:12 UTC
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 1590304 Bytes = 1.5 MB
Load Address: 50008000
Entry Point: 50008000
Verifying Checksum ... OK
OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0
Linux version 3.5.4 (pillar@Pillar) (gcc version 4.4.1 (Sourcery G++ Lite 2009q3-67) ) #5 Tue Sep 18 12:03:00 CST 2012
CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: MY6410 (我给板子起的名字)
Memory policy: ECC disabled, Data cache writeback
CPU S3C6410 (id 0x36410101)
S3C24XX Clocks, Copyright 2004 Simtec Electronics
camera: no parent clock specified
S3C64XX: PLL settings, A=532000000, M=532000000, E=24000000
S3C64XX: HCLK2=266000000, HCLK=133000000, PCLK=66500000
mout_apll: source is fout_apll (1), rate is 532000000
mout_epll: source is epll (1), rate is 24000000
mout_mpll: source is mpll (1), rate is 532000000
usb-bus-host: source is clk_48m (0), rate is 48000000
audio-bus: source is mout_epll (0), rate is 24000000
audio-bus: source is mout_epll (0), rate is 24000000
audio-bus: source is mout_epll (0), rate is 24000000
irda-bus: source is mout_epll (0), rate is 24000000
camera: no parent clock specified
CPU: found DTCM0 8k @ 00000000, not enabled
CPU: moved DTCM0 8k to fffe8000, enabled
CPU: found DTCM1 8k @ 00000000, not enabled
CPU: moved DTCM1 8k to fffea000, enabled
CPU: found ITCM0 8k @ 00000000, not enabled
CPU: moved ITCM0 8k to fffe0000, enabled
CPU: found ITCM1 8k @ 00000000, not enabled
CPU: moved ITCM1 8k to fffe2000, enabled
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
Kernel command line: root=/dev/mtdblock2 rootfstype=cramfs console=ttySAC0,115200
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 256MB = 256MB total
Memory: 256668k/256668k available, 5476k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
DTCM : 0xfffe8000 - 0xfffec000 ( 16 kB)
ITCM : 0xfffe0000 - 0xfffe4000 ( 16 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xd0800000 - 0xff000000 ( 744 MB)
lowmem : 0xc0000000 - 0xd0000000 ( 256 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.text : 0xc0008000 - 0xc029f1fc (2653 kB)
.init : 0xc02a0000 - 0xc02bac6c ( 108 kB)
.data : 0xc02bc000 - 0xc02e4a00 ( 163 kB)
.bss : 0xc02e5024 - 0xc0316004 ( 196 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:246
VIC @f6000000: id 0x00041192, vendor 0x41
VIC @f6010000: id 0x00041192, vendor 0x41
sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 4294967286ms
Console: colour dummy device 80x30
Calibrating delay loop... 528.79 BogoMIPS (lpj=2643968)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x501fb998 - 0x501fb9f4
s3c64xx_dma_init: Registering DMA channels
PL080: IRQ 73, at d0804000, channels 0..8
PL080: IRQ 74, at d0806000, channels 8..16
S3C6410: Initialising architecture
bio: create slab <bio-0> at 0
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
ROMFS MTD (C) 2007 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
start plist test
end plist test
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
s3c6400-uart.0: ttySAC0 at MMIO 0x7f005000 (irq = 69) is a S3C6400/10
console [ttySAC0] enabled
s3c6400-uart.1: ttySAC1 at MMIO 0x7f005400 (irq = 70) is a S3C6400/10
s3c6400-uart.2: ttySAC2 at MMIO 0x7f005800 (irq = 71) is a S3C6400/10
s3c6400-uart.3: ttySAC3 at MMIO 0x7f005c00 (irq = 72) is a S3C6400/10
brd: module loaded
loop: module loaded
S3C24XX NAND Driver, (c) 2004 Simtec Electronics
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
VFP support v0.3: implementor 41 architecture 1 part 20 variant b rev 5
drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
VFS: Cannot open root device "mtdblock2" or unknown-block(0,0): error -6
Please append a correct "root=" boot option; here are the available partitions:
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[<c0014be4>] (unwind_backtrace+0x0/0xf4) from [<c01f9148>] (panic+0x88/0x1c8)
[<c01f9148>] (panic+0x88/0x1c8) from [<c02a0cfc>] (mount_block_root+0x1e8/0x2ac)
[<c02a0cfc>] (mount_block_root+0x1e8/0x2ac) from [<c02a0f84>] (prepare_namespace+0x160/0x1b8)
[<c02a0f84>] (prepare_namespace+0x160/0x1b8) from [<c02a0394>] (kernel_init+0x164/0x1ac)
[<c02a0394>] (kernel_init+0x164/0x1ac) from [<c000fb28>] (kernel_thread_exit+0x0/0x8)