HDLBits刷题记录 Circuits—Combinational Logic—Arithmetic Circuits
·Adder1、typicalandfundamentalwaymoduletop_module(input[3:0]x,input[3:0]y,output[4:0]sum);wirecout0,cout1,cout2;fadderu1(x[0],y[0],0,sum[0],cout0);fadderu2(x[1],y[1],cout0,sum[1],cout1);fadderu3(x[2],y