TMS320F28335的SCI通信-FIFO中断通信实验
这两天在调28335的SCI通信，现在把实验过程跟大家分享:1.实验过程:通过串口调试助手1向DSP的SCIA接口发送一段代码，DSP接收到数据之后通过SCIB接口发送到串口软件2.同样串口软件通过SCIB向DSP发送数据，DSP通过SCIA发送到串口软件1.
2.实验说明:本例中使用了接收FIFO中断，但是并没有使用发送FIFO中断，而是使用判断标志位的方法发送数据。
3.实验代码:
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
#include "string.h"
// Prototype statements for functions found within this file.
interrupt void sciaTxFifoIsr(void);
interrupt void sciaRxFifoIsr(void);
interrupt void scibTxFifoIsr(void);
interrupt void scibRxFifoIsr(void);
void scia_fifo_init(void);
void scib_fifo_init(void);
void error(void);
void scib_xmit(int a);
void scib_msg(char *msg);
void scia_xmit(int a);
void scia_msg(char *msg);
char m[12]={'1','2','3','4','5','6','7','8','a','s','d','f'};
void main(void)
{
InitSysCtrl();
InitSciGpio();
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
PieVectTable.SCITXINTA = &sciaTxFifoIsr;
PieVectTable.SCIRXINTB = &scibRxFifoIsr;
PieVectTable.SCITXINTB = &scibTxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
scia_fifo_init(); // Init SCI-A
scib_fifo_init(); // Init SCI-B
scib_msg(m);
scia_msg(m);//先发送数据判断串口是否工作正常
// Enable interrupts required for this example
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, int1
PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
PieCtrlRegs.PIEIER9.bit.INTx3=1; // PIE Group 9, INT3
PieCtrlRegs.PIEIER9.bit.INTx4=1; // PIE Group 9, INT4
IER = 0x100; // Enable CPU INT
EINT;
while(1)
{
}
}
void error(void)
{
asm(" ESTOP0"); // Test failed!! Stop!
for (;;);
}
interrupt void sciaTxFifoIsr(void)
{
Uint16 i;
for(i=0;i<12;i++)
{
SciaRegs.SCITXBUF=m;
}
// ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;//清楚发送FIFO中断标志位。在此处如果清零会导致发送FIFO中断一直产生，因此要关闭才行
PieCtrlRegs.PIEACK.bit.ACK9=1;
}
interrupt void sciaRxFifoIsr(void)
{
Uint16 i;
for(i=0;i<12;i++)
{
m=SciaRegs.SCIRXBUF.all;
}
scib_msg(m);
SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;
// ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;
PieCtrlRegs.PIEACK.bit.ACK9=1;
}
void scia_fifo_init()
{
SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
// ScibRegs.SCICTL2.bit.TXINTENA =1;
// ScibRegs.SCICTL2.bit.RXBKINTENA =1;
SciaRegs.SCIHBAUD =0x0000;
SciaRegs.SCILBAUD =0x0079;
SciaRegs.SCIFFTX.bit.SCIFFENA=1;//使能FIFO
SciaRegs.SCIFFTX.bit.SCIRST=1;//继续执行功能
SciaRegs.SCIFFTX.bit.TXFFIENA=0;//不使能发送FIFO中断
SciaRegs.SCIFFTX.bit.TXFFIL=0x0C;//12级FIFO使能
SciaRegs.SCIFFTX.bit.TXFFINTCLR=1;
SciaRegs.SCIFFTX.bit.TXFIFOXRESET=0;
SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;
SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;
SciaRegs.SCIFFRX.bit.RXFIFORESET=0;
SciaRegs.SCIFFRX.bit.RXFFIENA=1;
SciaRegs.SCIFFRX.bit.RXFFIL=0x0C;
SciaRegs.SCIFFCT.all=0x00;
SciaRegs.SCICTL1.bit.SWRESET=1;//Relinquish SCI from Reset
SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
}
interrupt void scibTxFifoIsr(void)
{
Uint16 i;
for(i=0;i<12;i++)
{
ScibRegs.SCITXBUF=m;
}
// ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;//清除发送FIFO中断标志位。在此处如果清零会导致发送FIFO中断一直产生，因此要关闭才行
PieCtrlRegs.PIEACK.bit.ACK9=1;
}
interrupt void scibRxFifoIsr(void)
{
Uint16 i;
for(i=0;i<12;i++)
{
m=ScibRegs.SCIRXBUF.all;
}
scia_msg(m);
ScibRegs.SCIFFRX.bit.RXFFINTCLR=1;
// ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;
PieCtrlRegs.PIEACK.bit.ACK9=1;
}
void scib_fifo_init()
{
ScibRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
ScibRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
// ScibRegs.SCICTL2.bit.TXINTENA =1;
// ScibRegs.SCICTL2.bit.RXBKINTENA =1;
ScibRegs.SCIHBAUD =0x0000;
ScibRegs.SCILBAUD =0x0079;
ScibRegs.SCIFFTX.bit.SCIFFENA=1;//使能FIFO
ScibRegs.SCIFFTX.bit.SCIRST=1;//继续执行功能
ScibRegs.SCIFFTX.bit.TXFFIENA=0;//不使能发送FIFO中断
ScibRegs.SCIFFTX.bit.TXFFIL=0x0C;//12级FIFO使能
ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;
ScibRegs.SCIFFTX.bit.TXFIFOXRESET=0;
// ScibRegs.SCIFFTX.all=0xC02C;
ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;
ScibRegs.SCIFFRX.bit.RXFFINTCLR=1;
ScibRegs.SCIFFRX.bit.RXFIFORESET=0;
ScibRegs.SCIFFRX.bit.RXFFIENA=1;
ScibRegs.SCIFFRX.bit.RXFFIL=0x0C;
ScibRegs.SCIFFCT.all=0x00;
ScibRegs.SCICTL1.bit.SWRESET=1;//Relinquish SCI from Reset
ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
ScibRegs.SCIFFRX.bit.RXFIFORESET=1;
}
// Transmit a character from the SCI
void scib_xmit(int a)
{
while (ScibRegs.SCICTL2.bit.TXRDY == 0) {}
ScibRegs.SCITXBUF=a;
}
void scib_msg(char * msg)
{
Uint16 len;
Uint16 i;
len=(strlen(msg)-1);
for(i=0;i
scib_xmit(msg);
}
// return 0;
}
void scia_xmit(int a)//单个字符发送代码
{
while (SciaRegs.SCICTL2.bit.TXRDY == 0) {}
SciaRegs.SCITXBUF=a;
}
void scia_msg(char * msg)//发送字符串代码
{
Uint16 len;
Uint16 i;
len=(strlen(msg)-1);
for(i=0;i
scia_xmit(msg);
}
// return 0;
}
//===========================================================================
// No more.
//===========================================================================
4.实验结果如下所示:
5.说明:因为使用了FIFO中断，因此只有FIFO接收到12个数据之后才会进入中断读取数据，因此一次接收的数据不是很完全。使用FIFO的好处就是避免程序频繁进入中断。为了避免出现乱码，要根据要发送的字节来选择合适的波特率。串口1软件就是我自己写的软件(就是图中大的串口显示的)，串口2就是浮在串口1软件上面的那个。
6.下面一段代码是用发送FIFO中断发送数据的，给大家参考。
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
// Prototype statements for functions found within this file.
interrupt void scibTxFifoIsr(void);
interrupt void scibRxFifoIsr(void);
void scib_fifo_init(void);
void error(void);
char m[12]="12345678abcd";
void main(void)
{
InitSysCtrl();
InitSciGpio();
DINT;
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.SCIRXINTB = &scibRxFifoIsr;
PieVectTable.SCITXINTB = &scibTxFifoIsr;
EDIS; // This is needed to disable write to EALLOW protected registers
scib_fifo_init(); // Init SCI-B
PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
PieCtrlRegs.PIEIER9.bit.INTx3=1; // PIE Group 9, INT3
PieCtrlRegs.PIEIER9.bit.INTx4=1; // PIE Group 9, INT4
IER = 0x100; // Enable CPU INT
EINT;
for(;;);
}
void error(void)
{
asm(" ESTOP0"); // Test failed!! Stop!
for (;;);
}
interrupt void scibTxFifoIsr(void)
{
Uint16 i;
for(i=0;i<12;i++)
{
ScibRegs.SCITXBUF=m;
}
// ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;//清楚发送FIFO中断标志位。在此处如果清零会导致发送FIFO中断一直产生，因此要关闭才行
PieCtrlRegs.PIEACK.bit.ACK9=1;
}
interrupt void scibRxFifoIsr(void)
{
Uint16 i;
for(i=0;i<12;i++)
{
m=ScibRegs.SCIRXBUF.all;
}
ScibRegs.SCIFFRX.bit.RXFFINTCLR=1;
ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;
PieCtrlRegs.PIEACK.bit.ACK9=1;
}
void scib_fifo_init()
{
ScibRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
// No parity,8 char bits,
// async mode, idle-line protocol
ScibRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
// ScibRegs.SCICTL2.bit.TXINTENA =1;
// ScibRegs.SCICTL2.bit.RXBKINTENA =1;
ScibRegs.SCIHBAUD =0x0001;
ScibRegs.SCILBAUD =0x00E7;
ScibRegs.SCIFFTX.bit.SCIFFENA=1;//使能FIFO
ScibRegs.SCIFFTX.bit.SCIRST=1;//继续执行功能
ScibRegs.SCIFFTX.bit.TXFFIENA=1;//使能发送FIFO中断
ScibRegs.SCIFFTX.bit.TXFFIL=0x0C;//12级FIFO使能
ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;
ScibRegs.SCIFFTX.bit.TXFIFOXRESET=0;
ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;
ScibRegs.SCIFFRX.bit.RXFFINTCLR=1;
ScibRegs.SCIFFRX.bit.RXFIFORESET=0;
ScibRegs.SCIFFRX.bit.RXFFIENA=1;
ScibRegs.SCIFFRX.bit.RXFFIL=0x0C;
ScibRegs.SCIFFCT.all=0x00;
ScibRegs.SCICTL1.bit.SWRESET=1;//Relinquish SCI from Reset
ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
ScibRegs.SCIFFRX.bit.RXFIFORESET=1;
}
//===========================================================================
// No more.
//===========================================================================
之前上网查资料的时候，看到有人说在不使用FIFO的情况下需要先发送一个数据才能进入中断。可以使用 ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;来控制发送FIFO中断的进入。当想发送数据的时候就将中断标志清零，进入中断程序之后再进行数据加载发送。还可以添加标志位来确定在中断程序中发送那些数据。
大家如果觉得代码有问题，希望大家留言。
此帖出自TI C2000论坛