NVMe1.3_Initialization实现

基于NVM-Express-1_3a-20171024_ratified实现NVMe的初始化

① 49.6.1Controller Initialization

2.c.Program Central Control Module Reset Control (R15018004h)to all ones and then clear

the register. This step resets all hardware modules.

    CentralCtrlModuleRstCtrl_t ctrlReset;
  // Soft reset all modules (CREG, CSRM, BSRM, ..., PCIE),
    ctrlReset.all = 0;
    ctrlReset.b.CREG_RST = 1;
    ctrlReset.b.CSRAM_RST = 1;
    ctrlReset.b.BSRM_RST = 1;
    ctrlReset.b.DATM_RST = 1;
    ctrlReset.b.CMDF_RST = 1;
    ctrlReset.b.STSM_RST = 1;
    ctrlReset.b.QARB_RST = 1;
    ctrlReset.b.PCIE_PKTM_RST_NVME = 1;
    ctrlReset.b.PCIE_PKTM1_RST_NVME = 1;
    ctrlReset.b.CENT_RST = 1;
    ctrlReset.b.MI_RST = 1;
    ctrlReset.b.PCIE_CORE0_RST = 1;
    ctrlReset.b.PCIE_CORE1_RST = 1;
    rNvmeCentralCtrl.centralCtrlModuleRstCtrl.all = ctrlReset.all;  //0x80003737; // Soft reset all modules

② 49.6.2 Controller Reset

1.c. Set DATM_AXI_ABT(R150110F0h [0]).
Wait until DATM_SRAM_RD_DONE (R150110F4h[3]), DATM_SSDF_RD_DONE
(R150110F4h [2]), DATM_DDR_WR_DONE(R150110F4h [1]), and DATM_DDR_WR_DONE
(R150110F4h [1]), DATM_DDR_RD_DONE(R150110F4h [0]) are asserted.

 

rNvmeDataMngr.dataManagerAxiAbortCtrl.b.ABT = 0;

MEM_CLR(&NvmeHba, sizeof(NvmeHba_t)); // Initialize NvmeHba data structure and also delay before reset release
HalNvmeError_Reset();

// Reset CQ Repost FIFO

 CbReset(&sCqRepostFifo);

③ 49.6.2 Controller Reset

3. Perform a hardware soft reset as follows:
a. Program CENT_RST (R15018004h[13]) to 1h.  (*Had been set in 4.6.1.2.c)
b. Clear DATM_AXI_ABT (R150110F0h[0]).       (*Had been set in 4.6.2.1.c)
c. Program CENT_RST (R15018004h[13]) to 0h.

NvmeCentralCtrl.centralCtrlModuleRstCtrl.all = 0x00000000;     // Reset Release