支持N个request 的 round robin arbiter

1. 传统方法

 

状态机如下(三个request)

显然随着request增加,状态机会变得异常复杂,难于管理。

 

针对这种情况,提出了一种改良的方法:

从定义开始: 在每个cycle,只有一个master拥有最高优先权,如果这个拥有token的master没有request,则他的下一个master发出的request可以被ack。如下图

 

 

这样我们只需要实现priority logic 和ring counter两个部分就行了。各个request和priority logic的连接顺序有所调整变化,请务必注意。这种方法适合于4-8个master 的request。

 

下面我们来介绍一种更加通用的方法(主要利用二的补码)

 

Consider the following problem. You have a bit-string that represents the current scheduled slave in one-hot encoding. For example, "00000100" (with the leftmost bit being #7 and rightmost #0) means that slave #2 is scheduled.

Now, I want to pick the next scheduled slave in a round-robin scheduling scheme, with a twist. I have a "request mask" which says which slaves actually want to be scheduled. The next slave will be picked only from those that want to.

Some examples (assume round-robin scheduling is done by rotating left). Example1:

 

current : 当前拿到token的slave号。

mask: requests

next: 下一个拿到token的slave号。

  • Current: "00000100"
  • Mask: "01100000"
  • Next schedule: "00100000" - in normal round-robin, #3 and then #4 should come after #2, but they don't request, so #5 is picked.

Example2:

  • Current: "01000000"
  • Mask: "00001010"
  • Next: "00000010" - because scheduling is done by cycling left, and #1 is the first requesting slave in that order.

C语言实现代码:

mask_lo = (current << 1) - 1; // the bits to the right and including current mask_hi = ~mask_lo; // the bits to the left of current // the left bits, otherwise right: next = (mask & mask_hi) ? (mask & mask_hi) : (mask & mask_lo); return (next & -next); // the least significant bit set

 

verilog 实现

 

// 'base' is a one hot signal indicating the first request // that should be considered for a grant. Followed by higher // indexed requests, then wrapping around. // module arbiter ( req, grant, base ); parameter WIDTH = 16; input [WIDTH-1:0] req; output [WIDTH-1:0] grant; input [WIDTH-1:0] base; wire [2*WIDTH-1:0] double_req = {req,req}; wire [2*WIDTH-1:0] double_grant = double_req & ~(double_req-base); assign grant = double_grant[WIDTH-1:0] | double_grant[2*WIDTH-1:WIDTH]; endmodule

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