*****************************************************************************************************************************************************
开发板 :fl2440
cpu :s3c2440(arm920t)
交叉编译器:arm-linux-gcc-4.5.4
PC操作系统:CentOS-6.7
*****************************************************************************************************************************************************
前言:u-boot移植在BSP开发中算比较复杂的了,里面涉及到很多汇编,硬件知识,不花一两个月的时间是很难把它彻底搞懂的,当然大牛除外!之前移植过u-boot到fl2440开发板上,不过还没有进行过相应的总结,现在有时间来整理一下这个移植的过程,本文只是简单的记录其移植过程及移植过程中遇到的问题及相应的解决办法,也相当于是回顾一下移植过程吧,以后如有用到可以供自己参考。
1.u-boot移植准备
首先我们创建开发板移植相关的目录结构,除了移植 u-boot 的 u-boot 以外,我们还将今后移植的 Linux 内核,根文件系统,驱动,第三方应用程序以及我们自己写的相关程序都放到相应的目录下 。
[zoulei@CentOS ~]$ mkdir fl2440
[zoulei@CentOS ~]$ cd fl2440
[zoulei@CentOS ~]$ mkdir {bootloader,kernel,rootfs,driver,program,3rdparty}
[zoulei@CentOS ~]$ ll
总用量 28
drwxrwxr-x 2 zoulei zoulei 4096 12月 1 2016 3rdparty
drwxrwxr-x 3 zoulei zoulei 4096 12月 1 2016 bootloader
drwxrwxr-x 2 zoulei zoulei 4096 12月 1 2016 driver
drwxrwxr-x 3 zoulei zoulei 4096 12月 20 2016 kernel
drwxrwxr-x 2 zoulei zoulei 4096 12月 1 2016 program
drwxrwxr-x 2 zoulei zoulei 4096 12月 1 2016 rootfs
drwxrwxr-x 6 zoulei zoulei 4096 11月 20 2016 trunk
2.准备u-boot源码
[zoulei@CentOS ~]$ cd bootloader/
[zoulei@CentOS bootloader]$ wget ftp://ftp.denx.de/pub/u-boot/u-boot-2010.09.tar.bz2
[zoulei@CentOS bootloader]$ tar -xjf u-boot-2010.09.tar.bz2
[zoulei@CentOS bootloader]$ cd u-boot-2010.09
[zoulei@CentOS u-boot-2010.09]$ ls
api boards.cfg COPYING doc fs MAINTAINERS mkconfig onenand_ipl rules.mk
arch common CREDITS drivers include MAKEALL nand_spl post snapshot.commit
board config.mk disk examples lib Makefile net README tools
3.U-boot 移植之开发板建立与编译测试
3.1 u-boot 源码中添加 FL2440 开发板
[zoulei@CentOS u-boot-2010.09]$ cd board
[zoulei@CentOS board]$ mkdir -p zoulei/fl2440
[zoulei@CentOS board]$ cp samsung/smdk2410/* zoulei/fl2440/
[zoulei@CentOS board]$ cd zoulei/fl2440/
[zoulei@CentOS fl2440]$ mv smdk2410.c fl2440.c
[zoulei@CentOS fl2440]$ vim Makefile #将 Makefile 中的 smdk2410.o 改成 fl2440.o
-COBJS := smdk2410.o flash.o
+COBJS := fl2440.o flash.o
[zoulei@CentOS u-boot-2010.09]$ cp include/configs/smdk2410.h include/configs/fl2440.h
[zoulei@CentOS u-boot-2010.09]$ vim boards.cfg #在 smdk2410 一行下面添加 fl2440 这一行
smdk2410 arm arm920t - samsung s3c24x0
fl2440 arm arm920t fl2440 zoulei s3c24x0
3.2 u-boot初步编译测试
[zoulei@CentOS u-boot-2010.09]$ vim Makefile 找到相应行,添加我们的交叉编译器
... ...
export ARCH CPU BOARD VENDOR SOC
CROSS_COMPILE= /opt/buildroot-2012.08/arm920t/usr/bin/arm-linux-
... ...
[zoulei@CentOS u-boot-2010.09]$ make fl2440_config
Generating include/autoconf.mk
Generating include/autoconf.mk.dep
Configuring for fl2440 board...
[zoulei@CentOS u-boot-2010.09]$ make
... ... ... ... 这里要
/opt/buildroot-2012.08/arm920t/usr/bin/arm-linux-objcopy -O srec u-boot u-boot.srec
/opt/buildroot-2012.08/arm920t/usr/bin/arm-linux-objcopy --gap-fill=0xff -O binary u-boot
u-boot.bin
[zoulei@CentOS u-boot-2010.09]$ ls
api boards.cfg COPYING doc fs MAINTAINERS mkconfig onenand_ipl rules.mk tools u-boot.lds
arch common CREDITS drivers include MAKEALL nand_spl post snapshot.commit u-boot u-boot.map
board config.mk disk examples lib Makefile net README System.map u-boot.bin u-boot.srec
***************************************************************************************************************************************************
注意:这时候编译出来的 u-boot.bin 就是要烧到开发板上的 u-boot 文件,但这个代码是基于smdk2410 开发板的,我们并没有对这个代码作任何的修改,所以这个 bin 文件只能在smdk2410 这个开发板上跑。如果想运行在 FL2440 这个开发板上,接下来我们就要开始对源代码进行修改。
****************************************************************************************************************************************************
4.U-boot 移植之第一阶段汇编代码分析与修改
4.1 start.S 分析与修改
u-boot 是从 start.S 开始执行的,所以我们从 start.S 开始修改 。
[zoulei@CentOS u-boot-2010.09]$ vim arch/arm/cpu/arm920t/start.S
--- u-boot-2010.09/arch/arm/cpu/arm920t/start.S 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/arch/arm/cpu/arm920t/start.S 2017-03-11 20:50:35.299081717 -0800
@@ -113,6 +113,8 @@
bic r0, r0, #0x1f
orr r0, r0, #0xd3
msr cpsr, r0
+ @bl coloured_LED_init
+ @bl red_LED_on
bl coloured_LED_init
bl red_LED_on
@@ -159,13 +161,67 @@
ldr r1, =0x3ff
ldr r0, =INTSUBMSK
str r1, [r0]
+
+#elif defined CONFIG_S3C2440
+ ldr r1,=0x7fff
+ ldr r0,=INTSUBMSK
+ str r1, [r0]
+
# endif
+
+#if defined(CONFIG_S3C2440)
+#define GPBCON 0x56000010
+#define GPBDAT 0x56000014
+#define GPBUP 0x56000018
+/*Set GPIO5,GPIO6,GPIO8,GPIO10 as GPIO OUTPUT mode*/
+ ldr r0,=GPBCON
+ ldr r1,[r0]
+ bic r1,r1,#0x3c00 /*Set GPBCON for GPIO5,GPIO6 as 0x00*/
+ orr r1,r1,#0X1400 /*Set GPBCON for GPIO5,GPIO6 as GPIOOUT,0x01*/
+ bic r1,r1,#0x00330000 /*Set GPBCON for GPBIO8,GPIO10 as 0x00*/
+ orr r1,r1,#0x00110000 /*Set GPBCON for GPBIO8,GPIO10 as GPIOOUT,0x00*/
+ str r1,[r0]
+
+/*Set internal pullup resister*/
+ ldr r0,=GPBUP
+ ldr r1,[r0]
+ orr r1,r1,#0x0560 /*Set bit 5,6,8,10,disable pullup resister*/
+ str r1,[r0]
+
+ ldr r2,=GPBDAT
+ ldr r3,[r2]
+ orr r3,r3,#0x0560 /*Set bit 5,6,8,10,as high level,Turn Off LED*/
+ str r3,[r2]
+
+# define MPLLCON 0x4C000004
+# define MDIV_405 0x7f<<12
+# define PSDIV_405 0x21
+
+
+ /*FCLK:HCLK:PCLK= 1:4:8*/
+ ldr r0,=CLKDIVN
+ mov r1,#0x05
+ str r1,[r0]
+
+ mrc p15,0,r1,c1,c0,0
+ orr r1,r1,#0xc0000000
+ mcr p15,0,r1,c1,c0,0
+
+
+ Ldr r0,=MPLLCON
+ mov r1,#MDIV_405
+ add r1,r1,#PSDIV_405
+ str r1,[r0]
- /* FCLK:HCLK:PCLK = 1:2:4 */
+#else/*S3C2410,S3C2440*/
+
+ /*FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
+#endif/*end of if defined(CONFIG_S3C2440)*/
+
#endif /* CONFIG_S3C24X0 */
/*
@@ -183,6 +239,96 @@
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
+judgment_norflash_nandflash_boot:
+ ldr r1,=((4<<28)|(3<<4)|(3<<2)) /*)*/
+ mov r0,#0
+ str r0,[r1]
+ mov r1,#0x3c
+ ldr r0,[r1]
+ cmp r0,#0
+ bne norflash_boot
+ /*Nandflash boot going here, recovery address 0x0000003C date*/
+ ldr r0, =(0xdeadbeef)
+ ldr r1, =( (4<<28)|(3<<4)|(3<<2) )
+ str r0, [r1]
+
+nandflash_boot:
+#define LENGTH_UBOOT 0x60000
+#define NAND_CTL_BASE 0x4E000000
+
+/*OFFset*/
+
+#define oNFCONF 0x00
+#define oNFCONT 0x04
+#define oNFCMD 0x08
+#define oNFSTAT 0x20
+
+ mov r1,#NAND_CTL_BASE
+ ldr r2,=((7<<12)|(7<<8)|(7<<4)|(0<<0))
+ str r2,[r1,#oNFCONF]
+ ldr r2,[r1,#oNFCONF]
+ ldr r2,=((1<<4)|(0<<1)|(1<<0)) @Active low CE Control
+ str r2,[r1,#oNFCONT]
+ ldr r2,[r1,#oNFCONT]
+
+ ldr r2,=(0x6) @RnB Clear
+ str r2,[r1,#oNFSTAT]
+ ldr r2,[r1,#oNFSTAT]
+ mov r2,#0xff @ RESET command
+ strb r2,[r1,#oNFCMD]
+
+ mov r3,#0 @wait
+nand_delay:
+ add r3,r3,#0x1
+ cmp r3,#0xa
+ blt nand_delay
+
+nand_wait:
+ ldr r2,[r1,#oNFSTAT] @ wait ready
+ tst r2,#0x4
+ beq nand_wait
+
+ ldr r2,[r1,#oNFCONT]
+ orr r2,r2,#0x2 @Flash Memory Chip Disable
+ str r2,[r1,#oNFCONT]
+
+ ldr sp, DW_STACK_START @ setup stack pointer
+ mov fp, #0 @no previous frame,so fp=0
+
+ ldr r0,=TEXT_BASE
+ mov r1,#0x0
+ mov r2,#LENGTH_UBOOT
+ bl nand_read_ll
+ tst r0,#0x0
+ beq ok_nand_read
+bad_nand_read:
+dead_loop:
+ b dead_loop@infinite loop
+
+ok_nand_read:
+ @ verify
+ mov r0,#0
+ ldr r1,=TEXT_BASE
+ mov r2,#0x400
+
+go_next:
+ ldr r3,[r0],#4
+ ldr r4,[r1],#4
+ teq r3,r4
+ bne notmatch
+
+ subs r2,r2,#4
+ beq stack_setup
+ bne go_next
+
+notmatch:
+infinite_loop:
+ b infinite_loop @ infinite loop
+
+norflash_boot:
+
+
+
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
@@ -215,12 +361,26 @@
add r0, r0, #4
cmp r0, r1
ble clbss_l
+
+ ldr r1,=GPBDAT
+ ldr r2,[r1]
+ bic r2,r2,#(1<<5)
+ str r2,[r1]
+
ldr pc, _start_armboot
_start_armboot: .word start_armboot
+#ifdef CONFIG_S3C24X0
+#define STACK_BASE 0x33f00000
+#define STACK_SIZE 0x10000
+ .align 2
+DW_STACK_START:.word STACK_BASE+STACK_SIZE-4
+
+#endif
+
/*
*************************************************************************
*
4.2 lowlevel_init.S 分析与修改
--- u-boot-2010.09/board/samsung/smdk2410/lowlevel_init.S 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/board/zoulei/fl2440/lowlevel_init.S 2016-12-04 16:51:03.581943345 -0800
@@ -51,7 +51,7 @@
#define WAIT (0x1<<2)
#define UBLB (0x1<<3)
-#define B1_BWSCON (DW32)
+#define B1_BWSCON (DW16)
#define B2_BWSCON (DW16)
#define B3_BWSCON (DW16 + WAIT + UBLB)
#define B4_BWSCON (DW16)
@@ -120,10 +120,17 @@
/* REFRESH parameter */
#define REFEN 0x1 /* Refresh enable */
#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */
+#if defined(CONFIG_S3C2440)
+#define Trp 0x2 /*4clk*/
+#define Trc 0x3 /*7clk*/
+#define Tchr 0x2
+#define REFCNT 1268
+#else
#define Trp 0x0 /* 2clk */
#define Trc 0x3 /* 7clk */
#define Tchr 0x2 /* 3clk */
#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
+#endif
/**************************************/
_TEXT_BASE:
@@ -135,8 +142,10 @@
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
ldr r0, =SMRDATA
- ldr r1, _TEXT_BASE
+ ldr r1, =lowlevel_init
sub r0, r0, r1
+ adr r3,lowlevel_init /*r3<-current position of code*/
+ add r0,r0,r3
ldr r1, =BWSCON /* Bus Width Status Controller */
add r2, r0, #13*4
0:
@@ -162,6 +171,6 @@
.word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
.word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
.word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
- .word 0x32
+ .word 0xb2
.word 0x30
.word 0x30
4.3 添加 nand_read.c 源文件
/*
* nand_read.c: Simple NAND read functions for booting from NAND
* *
This is used by cpu/arm920/start.S assembler code,
* and the board-specific linker script must make sure this
* file is linked within the first 4kB of NAND flash.
* *
Taken from GPLv2 licensed vivi bootloader,
* Copyright (C) 2002 MIZI Research, Inc.
* *
Author: Hwang, Chideok
* Date : $Date: 2004/02/04 10:37:37 $
* *
u-boot integration and bad-block skipping (C) 2006 by OpenMoko, Inc.
* Author: Harald Welte
*/
#include
#include
#define __REGb(x) (*(volatile unsigned char *)(x))
#define __REGw(x) (*(volatile unsigned short *)(x))
#define __REGi(x) (*(volatile unsigned int *)(x))
#define NF_BASE 0x4e000000
#if defined(CONFIG_S3C2410)
#define NFCONF __REGi(NF_BASE + 0x0)
#define NFCMD __REGb(NF_BASE + 0x4)
#define NFADDR __REGb(NF_BASE + 0x8)
#define NFDATA __REGb(NF_BASE + 0xc)
#define NFSTAT __REGb(NF_BASE + 0x10)
#define NFSTAT_BUSY 1
#define nand_select() (NFCONF &= ~0x800)
#define nand_deselect() (NFCONF |= 0x800)
#define nand_clear_RnB() do {} while (0)
#elif defined(CONFIG_S3C2440) || defined(CONFIG_S3C2442)
#define NFCONF __REGi(NF_BASE + 0x0)
#define NFCONT __REGi(NF_BASE + 0x4)
#define NFCMD __REGb(NF_BASE + 0x8)
#define NFADDR __REGb(NF_BASE + 0xc)
#define NFDATA __REGb(NF_BASE + 0x10)
#define NFDATA16 __REGw(NF_BASE + 0x10)
#define NFSTAT __REGb(NF_BASE + 0x20)
#define NFSTAT_BUSY 1
#define nand_select() (NFCONT &= ~(1 << 1))
#define nand_deselect() (NFCONT |= (1 << 1))
#define nand_clear_RnB() (NFSTAT |= (1 << 2))
#endif
static inline void nand_wait(void)
{
int i;
while (!(NFSTAT & NFSTAT_BUSY))
for (i=0; i<10; i++);
}
struct boot_nand_t {
int page_size;
int block_size;
int bad_block_offset;
};
static int is_bad_block(struct boot_nand_t * nand, unsigned long i)
{
unsigned char data;
unsigned long page_num;
nand_clear_RnB();
if (nand->page_size == 512) {
NFCMD = NAND_CMD_READOOB; /* 0x50 */
NFADDR = nand->bad_block_offset & 0xf;
NFADDR = (i >> 9) & 0xff;
NFADDR = (i >> 17) & 0xff;
NFADDR = (i >> 25) & 0xff;
} else if (nand->page_size == 2048) {
page_num = i >> 11; /* addr / 2048 */
NFCMD = NAND_CMD_READ0;
NFADDR = nand->bad_block_offset & 0xff;
NFADDR = (nand->bad_block_offset >> 8) & 0xff;
NFADDR = page_num & 0xff;
NFADDR = (page_num >> 8) & 0xff;
NFADDR = (page_num >> 16) & 0xff;
NFCMD = NAND_CMD_READSTART;
} else {
return -1;
}
nand_wait();
data = (NFDATA & 0xff);
if (data != 0xff)
return 1;
return 0;
}
static int nand_read_page_ll(struct boot_nand_t * nand, unsigned char *buf, unsigned long addr)
{
unsigned short *ptr16 = (unsigned short *)buf;
unsigned int i, page_num;
nand_clear_RnB();
NFCMD = NAND_CMD_READ0;
if (nand->page_size == 512) {
/* Write Address */
NFADDR = addr & 0xff;
NFADDR = (addr >> 9) & 0xff;
NFADDR = (addr >> 17) & 0xff;
NFADDR = (addr >> 25) & 0xff;
} else if (nand->page_size == 2048) {
page_num = addr >> 11; /* addr / 2048 */
/* Write Address */
NFADDR = 0;
NFADDR = 0;
NFADDR = page_num & 0xff;
NFADDR = (page_num >> 8) & 0xff;
NFADDR = (page_num >> 16) & 0xff;
NFCMD = NAND_CMD_READSTART;
} else {
return -1;
}
nand_wait();
#if defined(CONFIG_S3C2410)
for (i = 0; i < nand->page_size; i++) {
*buf = (NFDATA & 0xff);
buf++;
}
#elif defined(CONFIG_S3C2440) || defined(CONFIG_S3C2442)
for (i = 0; i < (nand->page_size>>1); i++) {
*ptr16 = NFDATA16;
ptr16++;
}
#endif
return nand->page_size;
}
static unsigned short nand_read_id()
{
unsigned short res = 0;
NFCMD = NAND_CMD_READID;
NFADDR = 0;
res = NFDATA;
res = (res << 8) | NFDATA;
return res;
}
extern unsigned int dynpart_size[];
/* low level nand read function */
int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
{
int i, j;
unsigned short nand_id;
struct boot_nand_t nand;
/* chip Enable */
nand_select();
nand_clear_RnB();
for (i = 0; i < 10; i++)
;
nand_id = nand_read_id();
if (0) { /* dirty little hack to detect if nand id is misread */
unsigned short * nid = (unsigned short *)0x31fffff0;
*nid = nand_id;
}
if (nand_id == 0xec76 || /* Samsung K91208 on SD2410 board */
nand_id == 0xad76 ) { /*Hynix HY27US08121A*/
nand.page_size = 512;
nand.block_size = 16 * 1024;
nand.bad_block_offset = 5;
// nand.size = 0x4000000;
} else if (nand_id == 0xecf1 || /* Samsung K9F1G08U0B */
nand_id == 0xadda || /* Hynix HY27UF082G2B on FL2440 board */
nand_id == 0xecda || /* Samsung K9F2G08U0B on FL2440 board */
nand_id == 0xecd3 ) { /* Samsung K9K8G08 */
nand.page_size = 2048;
nand.block_size = 128 * 1024;
nand.bad_block_offset = nand.page_size;
// nand.size = 0x8000000;
} else {
return -1; // hang
}
if ((start_addr & (nand.block_size-1)) || (size & ((nand.block_size-1))))
return -1; /* invalid alignment */
for (i=start_addr; i < (start_addr + size);) {
#ifdef CONFIG_S3C2410_NAND_SKIP_BAD
if (i & (nand.block_size-1)== 0) {
if (is_bad_block(&nand, i) ||
is_bad_block(&nand, i + nand.page_size)) {
/* Bad block */
i += nand.block_size;
size += nand.block_size;
continue;
}
}
#endif
j = nand_read_page_ll(&nand, buf, i);
i += j;
buf += j;
}
/* chip Disable */
nand_deselect();
return 0;
}
修改
board/lingyun/fl2440/Makefile
,添加
nand_read.c
文件的编译支持 。
[zoulei@CentOS u-boot-2010.09]$ vim board/lingyun/fl2440/Makefile
--- u-boot-2010.09/board/samsung/smdk2410/Makefile 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/board/zoulei/fl2440/Makefile 2016-12-10 18:29:53.996985231 -0800
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS := smdk2410.o flash.o
+COBJS := fl2440.o nand_read.o
SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
为了保证
nand_read.c
和
lowlevel_init.c
编译出来的代码在
u-boot.bin
的前
4K
位置,我们需要修改
u-boot
链接文件
arch/arm/cpu/arm920t/u-boot.lds 。
[zoulei@CentOS u-boot-2010.09]$ vim arch/arm/cpu/arm920t/u-boot.lds
--- u-boot-2010.09/arch/arm/cpu/arm920t/u-boot.lds 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/arch/arm/cpu/arm920t/u-boot.lds 2016-12-04 14:29:23.220946033 -0800
@@ -40,6 +40,8 @@
.text :
{
arch/arm/cpu/arm920t/start.o (.text)
+ board/zoulei/fl2440/lowlevel_init.o (.text)
+ board/zoulei/fl2440/nand_read.o (.text)
*(.text)
}
5.U-boot 移植之第二阶段 C 代码修改
对 于 S3C2440 , 很 多 代 码 是 借 用 S3C2410 的 , 所 以 要 在 所 有 条 件 编 译 中 有CONFIG_S3C2410 的地方添加 CONFIG_S3C2440,这样这些代码才会编译进来。一个简单的方法就是在代码中搜索出所有的 CONFIG_S3C2410,并根据实际情况修改。在有些地方不仅要加入 CONFIG_S3C2440,还必须根据两个芯片的不同来分布做出修改,比如 PLL 的操作代码。我们可以使用下面命令找出所有的包含 CONFIG_S3C2410 的源文件 。
从所有的 C 文件中完全匹配查找 CONFIG_S3C2410,这里也是我们要添加 CONFIG_S3C2440 的地方。
[zoulei@CentOS u-boot-2010.09]$ find -iname "*.c" | xargs grep -n
"\
u-boot 中不会使用 I2C 总线,我们可以不用添加 S3C2440 的支持,如果需要以后再添加
./drivers/i2c/s3c24x0_i2c.c:60:#ifdef CONFIG_S3C2410
./drivers/i2c/s3c24x0_i2c.c:79:#ifdef CONFIG_S3C2410
./drivers/i2c/s3c24x0_i2c.c:131:#ifdef CONFIG_S3C2410
./drivers/i2c/s3c24x0_i2c.c:140:#ifdef CONFIG_S3C2410
./drivers/i2c/s3c24x0_i2c.c:166:#ifdef CONFIG_S3C2410
nand_read.c 是已经修改好支持 CONFIG_S3C2440 的,无需修改
./board/lingyun/fl2440/nand_read.c:26:#if defined(CONFIG_S3C2410)
./board/lingyun/fl2440/nand_read.c:125:#if defined(CONFIG_S3C2410)
u-boot 中需要使用串口,此处要添加 CONFIG_S3C2440 的支持
./common/serial.c:71:#elif defined(CONFIG_S3C2410)
./common/serial.c:160:#if defined(CONFIG_S3C2410)
从所有的头文件中完全匹配查找 CONFIG_S3C2410,这里也是我们要添加 CONFIG_S3C2440 的地方
[zoulei@CentOS u-boot-2010.09]$ find -iname "*.h" | xargs grep -n
"\
./include/configs/fl2440.h:38:#define CONFIG_S3C2410 1 /* specifically a
SAMSUNG S3C2410 SoC */ 我们的 FL2440 开发板配置头文件,需要修改为 CONFIG_S3C2440
./include/configs/sbc2410x.h:48:#define CONFIG_S3C2410 1 /* specifically a
SAMSUNG S3C2410 SoC */ SBC2410X 开发板,不需要修改
./include/configs/smdk2410.h:38:#define CONFIG_S3C2410 1 /* specifically a
SAMSUNG S3C2410 SoC */ SMDK2410 开发板,不需要修改
./include/configs/VCMA9.h:38:#define CONFIG_S3C2410 1 /* specifically a
SAMSUNG S3C2410 SoC */ VCMA9 开发板,不需要修改
串口头文件,需要添加 CONFIG_S3C2440 支持
./include/serial.h:49:#if defined(CONFIG_S3C2410)
s3c24x0.h 中定义了各个寄存器组的结构体,这里所有的需要添加 CONFIG_S3C2440 的支持
./arch/arm/include/asm/arch-s3c24x0/s3c24x0.h:81:#ifdef CONFIG_S3C2410
./arch/arm/include/asm/arch-s3c24x0/s3c24x0.h:91:#ifdef CONFIG_S3C2410
./arch/arm/include/asm/arch-s3c24x0/s3c24x0.h:95:#ifdef CONFIG_S3C2410
./arch/arm/include/asm/arch-s3c24x0/s3c24x0.h:106:#ifdef CONFIG_S3C2410
./arch/arm/include/asm/arch-s3c24x0/s3c24x0.h:144:#ifdef CONFIG_S3C2410
./arch/arm/include/asm/arch-s3c24x0/s3c24x0.h:400:#ifdef CONFIG_S3C2410
./arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h:23:#elif defined CONFIG_S3C2410
在前面我们是基于 SMDK2410 开发板的来建立的 FL2440 开发板代码,而 SMDK2410 使
用的是 S3C2410,CONFIG_S3C2410 是定义在头文件 include/configs/smdk2410.h 中。而我们
的 include/configs/fl2440.h 头文件是由它拷贝而来的,所以我们要对这个头文件做如下修改,
添加 CONFIG_S3C2440 的定义:
[zoulei@CentOS u-boot-2010.09]$ vim include/configs/fl2440.h
--- u-boot-2010.09/include/configs/smdk2410.h 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/include/configs/fl2440.h 2016-12-11 14:42:26.046158886 -0800
@@ -35,8 +35,8 @@
*/
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
-#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
-#define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
+#define CONFIG_S3C2440 1 /* specifically a SAMSUNG S3C2440 SoC */
+#define CONFIG_FL2440 1 /* FL2440 Board */
/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */
@@ -54,11 +54,22 @@
/*
* Hardware drivers
*/
+#if 0
#define CONFIG_NET_MULTI
#define CONFIG_CS8900 /* we have a CS8900 on-board */
#define CONFIG_CS8900_BASE 0x19000300
#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
-
+#else
+#define CONFIG_NET_MULTI 1
+#define CONFIG_NET_RETRY_COUNT 20
+#define CONFIG_DRIVER_DM9000 1
+#define CONFIG_DM9000_BASE 0x20000300 /* nGCS4 */
+#define DM9000_IO CONFIG_DM9000_BASE
+#define DM9000_DATA (CONFIG_DM9000_BASE+4)
+#define CONFIG_DM9000_USE_16BIT 1
+#define CONFIG_DM9000_NO_SROM 1
+#undef CONFIG_DM9000_DEBUG
+#endif
/*
* select serial console configuration
*/
@@ -89,18 +100,21 @@
* Command line configuration.
*/
#include
-
+#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ELF
-
-
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_SYS_NO_FLASH 1
+#undef CONFIG_CMD_IMLS
#define CONFIG_BOOTDELAY 3
/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
-/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b */
+#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_IPADDR 10.0.0.110
-#define CONFIG_SERVERIP 10.0.0.1
+#define CONFIG_IPADDR 192.168.1.168
+#define CONFIG_SERVERIP 192.168.1.2
/*#define CONFIG_BOOTFILE "elinos-lart" */
/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
@@ -114,7 +128,7 @@
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "SMDK2410 # " /* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT "[fl2440@zoulei]# " /* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
@@ -155,9 +169,8 @@
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-
-#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
#if 0
+#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
#endif
@@ -173,11 +186,38 @@
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000) /* addr of environment */
#endif
+#define CONFIG_SYS_NO_FLASH
+
/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT (5*CONFIG_SYS_HZ) /* Timeout for Flash Write */
-
+#ifndef CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
+#endif
+#if defined(CONFIG_CMD_NAND)
+#define CONFIG_NAND_S3C2410
+#define CONFIG_S3C2410_NAND_SKIP_BAD 1
+#define CONFIG_SYS_NAND_BASE 0x4E000000
+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define CONFIG_SYS_NAND_MAX_CHIPS 1
+#define CONFIG_MTD_NAND_VERIFY_WRITE
+#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_OFFSET 0X60000
+#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
+#endif /* CONFIG_CMD_NAND */
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+#ifdef CONFIG_CMDLINE_EDITING
+#undef CONFIG_AUTO_COMPLETE
+#else
+#define CONFIG_AUTO_COMPLETE
+#endif
+
#endif /* __CONFIG_H */
修改串口代码,添加
CONFIG_S3C2440
的支持
[zoulei@CentOS u-boot-2010.09]$ vim include/serial.h
--- u-boot-2010.09/include/serial.h 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/include/serial.h 2016-12-04 16:56:04.279943297 -0800
@@ -46,7 +46,7 @@
extern struct serial_device serial6_device;
#endif
-#if defined(CONFIG_S3C2410)
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
extern struct serial_device s3c24xx_serial0_device;
extern struct serial_device s3c24xx_serial1_device;
extern struct serial_device s3c24xx_serial2_device;
[zoulei@CentOS u-boot-2010.09]$ vim common/serial.c
--- u-boot-2010.09/common/serial.c 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/common/serial.c 2016-12-04 17:00:21.392942802 -0800
@@ -68,7 +68,7 @@
#else
#error "Bad CONFIG_PSC_CONSOLE."
#endif
-#elif defined(CONFIG_S3C2410)
+#elif defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
#if defined(CONFIG_SERIAL1)
return &s3c24xx_serial0_device;
#elif defined(CONFIG_SERIAL2)
@@ -157,7 +157,7 @@
#if defined (CONFIG_STUART)
serial_register(&serial_stuart_device);
#endif
-#if defined(CONFIG_S3C2410)
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
serial_register(&s3c24xx_serial0_device);
serial_register(&s3c24xx_serial1_device);
serial_register(&s3c24xx_serial2_device);
修改 arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h
[zoulei@CentOS u-boot-2010.09]$ vim arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h
--- u-boot-2010.09/arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/arch/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.h 2016-12-10 15:54:53.087992683 -0800
@@ -20,8 +20,9 @@
#ifdef CONFIG_S3C2400
#include
-#elif defined CONFIG_S3C2410
- #include
+#elif defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
+ /*h/arm/include/asm/arch-s3c24x0/s3c24x0_cpu.hnclude8*/
+#include
#else
#error Please define the s3c24x0 cpu type
#endif
修改
arch/arm/include/asm/arch-s3c24x0/s3c24x0.h
--- u-boot-2010.09/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h 2016-12-04 18:51:50.780941090 -0800
@@ -1,4 +1,5 @@
/*
+truct s3c24x0_clock_power*
* (C) Copyright 2003
* David M▒ller ELSOFT AG Switzerland. [email protected]
*
@@ -78,7 +79,7 @@
u32 PRIORITY;
u32 INTPND;
u32 INTOFFSET;
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
u32 SUBSRCPND;
u32 INTSUBMSK;
#endif
@@ -88,11 +89,11 @@
/* DMAS (see manual chapter 8) */
struct s3c24x0_dma {
u32 DISRC;
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
u32 DISRCC;
#endif
u32 DIDST;
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
u32 DIDSTC;
#endif
u32 DCON;
@@ -103,7 +104,7 @@
#ifdef CONFIG_S3C2400
u32 res[1];
#endif
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
u32 res[7];
#endif
};
@@ -122,9 +123,12 @@
u32 CLKCON;
u32 CLKSLOW;
u32 CLKDIVN;
+ u32 CAMDIVN;
+#if defined(CONFIG_S3C2440)
+
+#endif
};
-
/* LCD CONTROLLER (see manual chapter 15) */
struct s3c24x0_lcd {
u32 LCDCON1;
@@ -141,7 +145,7 @@
u32 res[8];
u32 DITHMODE;
u32 TPAL;
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
u32 LCDINTPND;
u32 LCDSRCPND;
u32 LCDINTMSK;
@@ -151,6 +155,7 @@
/* NAND FLASH (see S3C2410 manual chapter 6) */
+#if defined(CONFIG_S3C2410)
struct s3c2410_nand {
u32 NFCONF;
u32 NFCMD;
@@ -159,8 +164,26 @@
u32 NFSTAT;
u32 NFECC;
};
-
-
+#elif defined(CONFIG_S3C2440)
+struct s3c2410_nand{
+ u32 NFCONF;
+ u32 NFCONT;
+ u32 NFCMD;
+ u32 NFADDR;
+ u32 NFDATA;
+ u32 NFMECCD0;
+ u32 NFMECCD1;
+ u32 NFSECCD;
+ u32 NFSTAT;
+ u32 NFESTAT0;
+ u32 NFESTAT1;
+ u32 NFMECC0;
+ u32 NFMECC1;
+ u32 NFSECC;
+ u32 NFSBLK;
+ u32 NFEBLK;
+};
+#endif
/* UART (see manual chapter 11) */
struct s3c24x0_uart {
u32 ULCON;
@@ -397,7 +420,7 @@
u32 MISCCR;
u32 EXTINT;
#endif
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410)||defined(CONFIG_S3C2440)
u32 GPACON;
u32 GPADAT;
u32 res1[2];
@@ -446,6 +469,14 @@
u32 GSTATUS2;
u32 GSTATUS3;
u32 GSTATUS4;
+
+#if defined(CONFIG_S3C2440)
+ u32 res9[3];
+ u32 MSLCON;
+ u32 GPJCON;
+ u32 GPJDAT;
+ u32 GPJUP;
+#endif
#endif
};
修改
arch/arm/cpu/arm920t/s3c24x0/timer.c
[zoulei@CentOS u-boot-2010.09]$ vim arch/arm/cpu/arm920t/s3c24x0/timer.c
--- u-boot-2010.09/arch/arm/cpu/arm920t/s3c24x0/timer.c 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/arch/arm/cpu/arm920t/s3c24x0/timer.c 2016-12-04 18:18:19.845941659 -0800
@@ -181,6 +181,7 @@
tbclk = timer_load_val * 100;
#elif defined(CONFIG_SBC2410X) || \
defined(CONFIG_SMDK2410) || \
+ defined(CONFIG_FL2440) || \
defined(CONFIG_VCMA9)
tbclk = CONFIG_SYS_HZ;
#else
S3C2440
的时钟管理和
S3C2410
有很大区别,需要修改
arch/arm/cpu/arm920t/s3c24x0/speed.c--- u-boot-2010.09/arch/arm/cpu/arm920t/s3c24x0/speed.c 2010-09-28 14:20:55.000000000 -0700
+++ u-boot-2010.09-modifyed/arch/arm/cpu/arm920t/s3c24x0/speed.c 2016-12-04 18:33:18.879941703 -0800
@@ -44,6 +44,11 @@
* CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
*
* get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
* the specified bus in HZ.
*/
/* ------------------------------------------------------------------------- */
@@ -64,7 +69,12 @@
p = ((r & 0x003F0) >> 4) + 2;
s = r & 0x3;
- return (CONFIG_SYS_CLK_FREQ * m) / (p << s);
+#if defined(CONFIG_S3C2440)
+ if(pllreg==MPLL)
+ return((CONFIG_SYS_CLK_FREQ*m*2)/(p<CLKDIVN)&0x6)
+ {
+ if((readl(&clk_power->CLKDIVN)&0x6)==2)
+ return(get_FCLK()/2);
+ if((readl(&clk_power->CLKDIVN)&0x6)==6)
+ return((readl(&clk_power->CAMDIVN) & 0x100)? get_FCLK()/6 :get_FCLK()/3);
+ if((readl(&clk_power->CLKDIVN)&0x6)==4)
+ return((readl(&clk_power->CAMDIVN) & 0X200) ? get_FCLK()/8 :get_FCLK()/4);
+ return(get_FCLK());
+
+ }
+ else
+ return(get_FCLK());
+#else
return (readl(&clk_power->CLKDIVN) & 2) ? get_FCLK() / 2 : get_FCLK();
+#endif
}
/* return PCLK frequency */