mt7620 u-boot解析

源码地址：https://github.com/cleanwrt/u-boot_mt7620
从mt7620_uboot/cpu/ralink_soc/start.S ：

la  t9, board_init_f 

进入c代码中，相继调用board_init_f和board_init_r， 进入main_loop中。
查看启动信息，找出与打印信息相对应的代码：

U-Boot 1.1.3 (Jul 9 2016 - 11:19:18)

Board: Ralink APSoC DRAM: 128 MB
relocate_code Pointer at: 87fb8000
enable ephy clock...done. rf reg 29 = 5
SSC disabled.
spi_wait_nsec: 29 
spi device id: ef 40 18 0 0 (40180000)
find flash: W25Q128BV
raspi_read: from:30000 len:1000 
raspi_read: from:30000 len:1000 
============================================ 
Ralink UBoot Version: 4.2.1.0
-------------------------------------------- 
ASIC 7620_MP (Port5<->None)
DRAM component: 1024 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 128 MBytes
Flash component: SPI Flash
Date:Jul 9 2016 Time:11:19:18
============================================ 
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 580 MHZ #### 
estimate memory size =128 Mbytes

Please choose the operation: 
1: Load system code to SDRAM via TFTP. 
2: Load system code then write to Flash via TFTP. 
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial. 
9: Load Boot Loader code then write to Flash via TFTP. 
2 
You choosed 4

0 
raspi_read: from:40028 len:6


4: System Enter Boot Command Line Interface.

U-Boot 1.1.3 (Jul 9 2016 - 11:19:18)
MT7620 # 

board_init_f 函数分析：

void board_init_f(ulong bootflag)
{
    gd_t gd_data, *id;
    bd_t *bd;  
    //init_fnc_t **init_fnc_ptr;
    ulong addr, addr_sp, len = (ulong)&uboot_end - CFG_MONITOR_BASE;
    ulong *s;
    u32 value;
    u32 fdiv = 0, step = 0, frac = 0, i;

    ......

    timer_init();
    env_init();     /* initialize environment */
    init_baudrate();        /* initialze baudrate settings */
    serial_init();      /* serial communications setup 初始化出口，开始使用串口*/
    console_init_f();
    display_banner();       /* say that we are here 从这里开始输入出口信息，打印u-boot版本*/
    checkboard();  /*这里输出：Board: Ralink APSoC*/      

    init_func_ram(); /*这里输出：DRAM: 和打印的DRAM的值*/

    ......

#if defined(CFG_RUN_CODE_IN_RAM)
    /* 
     * tricky: relocate code to original TEXT_BASE
     * for ICE souce level debuggind mode   
     * 这里执行 “relocate_code Pointer at: 87fb8000”
     */ 
    debug ("relocate_code Pointer at: %08lx\n", addr);
    relocate_code (addr_sp, id, /*TEXT_BASE*/ addr);    
#else
    debug ("relocate_code Pointer at: %08lx\n", addr);
    relocate_code (addr_sp, id, addr);
#endif

    /* NOTREACHED - relocate_code() does not return */
}

开始转入board_init_r函数：

void board_init_r (gd_t *id, ulong dest_addr)
{
    cmd_tbl_t *cmdtp;
    ulong size;
    extern void malloc_bin_reloc (void);
#ifndef CFG_ENV_IS_NOWHERE
    extern char * env_name_spec;
#endif
    char *s, *e;
    bd_t *bd;
    int i;
    int timer1= CONFIG_BOOTDELAY;
    unsigned char BootType='3', confirm=0;
    int my_tmp;
    char addr_str[11];
#if defined (CFG_ENV_IS_IN_FLASH)
    ulong e_end;
#endif

     ......

#if defined(MT7620_ASIC_BOARD)
    /* Enable E-PHY clock */ /* TODO: remove printf()*/ 
    /* 这里enable E-phy 时钟，，，*/
    printf("enable ephy clock..."); 
    i = 5;
    rw_rf_reg(1, 29, &i);
    printf("done. ");
    rw_rf_reg(0, 29, &i);
    printf("rf reg 29 = %d\n", i);   /*这里取值*/

    /* print SSC for confirmation */ /* TODO: remove these in formanl release*/ 
    /*这里打印ssc */
    u32 value = RALINK_REG(0xb0000054);
    value = value >> 4;
    if(value & 0x00000008){
        unsigned long swing = ((value & 0x00000007) + 1) * 1250;
        printf("SSC enabled. swing=%d, upperbound=%d\n", swing, (value >> 4) & 0x3);
    }else{
        printf("SSC disabled.\n");
    }

#endif

    .......

/*这里开始找到flash设备，并进行初始化*/
#if defined (CFG_ENV_IS_IN_NAND)
#if defined (MT7621_ASIC_BOARD) || defined (MT7621_FPGA_BOARD)
    if ((size = mtk_nand_probe()) != (ulong)0) {
        printf("nand probe fail\n");
        while(1);
    }
#else
    if ((size = ranand_init()) == (ulong)-1) {
        printf("ra_nand_init fail\n");
        while(1);
    }
#endif  
    bd->bi_flashstart = 0;
    bd->bi_flashsize = size;
    bd->bi_flashoffset = 0;
#elif defined (CFG_ENV_IS_IN_SPI)  /*mt7620一般使用spi flash, 从这里开始执行spi*/
    if ((size = raspi_init()) == (ulong)-1) {   /*raspin_init中执行spic_init(),打印出：spi_wait_nsec: 29  ， 执行 chip_prob()，打印出 ：spi device id: ef 40 18 0 0 (40180000), 并获取flash型号，打印出：find flash: W25Q128BV*/
        printf("ra_spi_init fail\n");
        while(1);
    }
    bd->bi_flashstart = 0;
    bd->bi_flashsize = size;
    bd->bi_flashoffset = 0;
#else //CFG_ENV_IS_IN_FLASH
    /* configure available FLASH banks */
    size = flash_init();

    bd->bi_flashstart = CFG_FLASH_BASE;
    bd->bi_flashsize = size;
#if CFG_MONITOR_BASE == CFG_FLASH_BASE
    bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */
#else
    bd->bi_flashoffset = 0;
#endif
#endif //CFG_ENV_IS_IN_FLASH

    /* initialize malloc() area */
    mem_malloc_init();
    malloc_bin_reloc();

#if defined (CFG_ENV_IS_IN_NAND)
    nand_env_init();
#elif defined (CFG_ENV_IS_IN_SPI)
    spi_env_init();   /*这里设置spi, 初始化spi环境，分配spi地址信息*/
#else //CFG_ENV_IS_IN_FLASH
#endif //CFG_ENV_IS_IN_FLASH


    /* relocate environment function pointers etc. */
    env_relocate();

    /* board MAC address */
    s = getenv ("ethaddr");
    for (i = 0; i < 6; ++i) {
        bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
        if (s)
            s = (*e) ? e + 1 : e;
    }

    /* IP Address */
    bd->bi_ip_addr = getenv_IPaddr("ipaddr");

#if defined(CONFIG_PCI)
    /*
     * Do pci configuration
     */
    puts("\n  Do pci configuration  !!\n");
    pci_init();
#endif

    /** leave this here (after malloc(), environment and PCI are working) **/
    /* Initialize devices */
    devices_init ();

    jumptable_init ();

    /* Initialize the console (after the relocation and devices init) */
    console_init_r ();

    /* Initialize from environment */
    if ((s = getenv ("loadaddr")) != NULL) {
        load_addr = simple_strtoul (s, NULL, 16);
    }
#if (CONFIG_COMMANDS & CFG_CMD_NET)
    if ((s = getenv ("bootfile")) != NULL) {
        copy_filename (BootFile, s, sizeof (BootFile));
    }
#endif  /* CFG_CMD_NET */

#if defined(CONFIG_MISC_INIT_R)
    /* miscellaneous platform dependent initialisations */
    misc_init_r ();
#endif



    ........


/* 这里打印出ralink uboot的版本信息*/
        printf("============================================ \n");
        printf("Ralink UBoot Version: %s\n", RALINK_LOCAL_VERSION);
        printf("-------------------------------------------- \n");  
        /*  这里打印出芯片类型，版本，模式信息：ASIC 7620_MP (Port5<->None) */
        printf("%s %s %s\n",CHIP_TYPE, CHIP_VERSION, GMAC_MODE);
#if defined (RT6855A_ASIC_BOARD) || defined (RT6855A_FPGA_BOARD)
#if defined (RT6855A_FPGA_BOARD)

    ......

#elif defined (MT7620_ASIC_BOARD) || defined(MT7620_FPGA_BOARD) || defined (MT7628_ASIC_BOARD) || defined(MT7628_FPGA_BOARD)
        printf("DRAM_CONF_FROM: %s \n", (((RALINK_REG(RALINK_SYSCTL_BASE+0x10)>>8)&0x1)==0) ? "From SPI/NAND": 
                (((chip_mode==2)||(chip_mode==3)) ? "From Uboot" : "Auto-detection"));
#else
        printf("DRAM_CONF_FROM: %s \n", ((RALINK_REG(RALINK_SYSCTL_BASE+0x10)>>7)&0x1) ? "From SPI/NAND":
                (((chip_mode==2)||(chip_mode==3)) ? "From Uboot" : "Auto-detection"));
#endif  
    /* 这里打印出DRAM信息， flash ，日期，  
     * DRAM component: 1024 Mbits DDR, width 16
    * DRAM bus: 16 bit
    * Total memory: 128 MBytes
    * Flash component: SPI Flash
    * Date:Jul 9 2016 Time:11:19:18   */
        printf("DRAM_TYPE: %s \n", is_ddr2 ? "DDR2": (is_ddr1 ? "DDR1" : "SDRAM"));
        printf("DRAM component: %d Mbits\n", dram_comp);
        printf("DRAM bus: %d bit\n", dram_bus);
        printf("Total memory: %d MBytes\n", size);
        printf("%s\n", FLASH_MSG);
        printf("%s\n", "Date:" __DATE__ "  Time:" __TIME__ );
        printf("============================================ \n");
    }

    .....



    .....

#else

    config1 = read_32bit_cp0_register_with_select1(CP0_CONFIG);

    if ((lsize = ((config1 >> 19) & 7)))
        icache_linesz = 2 << lsize;
    else
        icache_linesz = lsize;
    icache_sets = 64 << ((config1 >> 22) & 7);
    icache_ways = 1 + ((config1 >> 16) & 7);

    icache_size = icache_sets *
        icache_ways *
        icache_linesz;

    printf("icache: sets:%d, ways:%d, linesz:%d ,total:%d\n", 
            icache_sets, icache_ways, icache_linesz, icache_size);

    /*
     * Now probe the MIPS32 / MIPS64 data cache.
     */

    if ((lsize = ((config1 >> 10) & 7)))
        dcache_linesz = 2 << lsize;
    else
        dcache_linesz = lsize;
    dcache_sets = 64 << ((config1 >> 13) & 7);
    dcache_ways = 1 + ((config1 >> 7) & 7);

    dcache_size = dcache_sets *
        dcache_ways *
        dcache_linesz; 

        /* 这里打印出缓存信息： 
        * icache: sets:512, ways:4, linesz:32 ,total:65536
        * dcache: sets:256, ways:4, linesz:32 ,total:32768
        */

    printf("dcache: sets:%d, ways:%d, linesz:%d ,total:%d \n", 
            dcache_sets, dcache_ways, dcache_linesz, dcache_size);

#endif
        /* 打印出  ##### The CPU freq = 580 MHZ #### */
    debug("\n ##### The CPU freq = %d MHZ #### \n",mips_cpu_feq/1000/1000);

/*
    if(*(volatile u_long *)(RALINK_SYSCTL_BASE + 0x0304) & (1<< 24))
    {
        debug("\n SDRAM bus set to 32 bit \n");
    }
    else
    {
        debug("\nSDRAM bus set to 16 bit \n");
    }
*/   

    /* 打印出：estimate memory size =128 Mbytes*/
    debug(" estimate memory size =%d Mbytes\n",gd->ram_size /1024/1024 );

#if defined (RT3052_ASIC_BOARD) || defined (RT3052_FPGA_BOARD)  || \
    defined (RT3352_ASIC_BOARD) || defined (RT3352_FPGA_BOARD)  || \
    defined (RT5350_ASIC_BOARD) || defined (RT5350_FPGA_BOARD)  || \
    defined (MT7628_ASIC_BOARD) || defined (MT7628_FPGA_BOARD)
    rt305x_esw_init();
#elif defined (RT6855_ASIC_BOARD) || defined (RT6855_FPGA_BOARD) || \
      defined (MT7620_ASIC_BOARD) || defined (MT7620_FPGA_BOARD)
    rt_gsw_init();
#elif defined (RT6855A_ASIC_BOARD) || defined (RT6855A_FPGA_BOARD)
#ifdef FPGA_BOARD
    rt6855A_eth_gpio_reset();
#endif
    rt6855A_gsw_init();
#elif defined (MT7621_ASIC_BOARD) || defined (MT7621_FPGA_BOARD)
#if defined (MAC_TO_MT7530_MODE) || defined (GE_RGMII_INTERNAL_P0_AN) || defined (GE_RGMII_INTERNAL_P4_AN)
    //enable MDIO
    RALINK_REG(0xbe000060) &= ~(1 << 12); //set MDIO to Normal mode
    RALINK_REG(0xbe000060) &= ~(1 << 14); //set RGMII1 to Normal mode
    RALINK_REG(0xbe000060) &= ~(1 << 15); //set RGMII2 to Normal mode
    setup_internal_gsw();
#endif
#elif defined (RT3883_ASIC_BOARD) && defined (MAC_TO_MT7530_MODE)
        rt3883_gsw_init();
#endif
    LANWANPartition();

#ifdef DUAL_IMAGE_SUPPORT
    check_image_validation();
#endif
/*config bootdelay via environment parameter: bootdelay */
    {
        char * s;
        s = getenv ("bootdelay");
        timer1 = s ? (int)simple_strtol(s, NULL, 10) : CONFIG_BOOTDELAY;
    }

    OperationSelect();  /* 调用选择菜单*/ 
    while (timer1 > 0) {
        --timer1;
        /* delay 100 * 10ms */
        for (i=0; i<100; ++i) {
            if ((my_tmp = tstc()) != 0) {   /* we got a key press   */
                timer1 = 0; /* no more delay    */
                BootType = getc();
                if ((BootType < '0' || BootType > '5') && (BootType != '7') && (BootType != '8') && (BootType != '9'))
                    BootType = '3';
                printf("\n\rYou choosed %c\n\n", BootType);
                break;
            }
            udelay (10000);
        }
        printf ("\b\b\b%2d ", timer1);
    }
    putc ('\n');
    if(BootType == '3') {
        char *argv[2];
        sprintf(addr_str, "0x%X", CFG_KERN_ADDR);
        argv[1] = &addr_str[0];
        printf("   \n3: System Boot system code via Flash.\n");
        do_bootm(cmdtp, 0, 2, argv);
    }
    else {
        char *argv[4];
        int argc= 3;

        argv[2] = &file_name_space[0];
        memset(file_name_space,0,ARGV_LEN);

#if (CONFIG_COMMANDS & CFG_CMD_NET)
        eth_initialize(gd->bd);
#endif
         /* 选择启动方式 */
        switch(BootType) {
        case '1':
            printf("   \n%d: System Load Linux to SDRAM via TFTP. \n", SEL_LOAD_LINUX_SDRAM);
            tftp_config(SEL_LOAD_LINUX_SDRAM, argv);           
            argc= 3;
            setenv("autostart", "yes");
            do_tftpb(cmdtp, 0, argc, argv);
            break;

        case '2':
            printf("   \n%d: System Load Linux Kernel then write to Flash via TFTP. \n", SEL_LOAD_LINUX_WRITE_FLASH);
            printf(" Warning!! Erase Linux in Flash then burn new one. Are you sure?(Y/N)\n");
            confirm = getc();
            if (confirm != 'y' && confirm != 'Y') {
                printf(" Operation terminated\n");
                break;
            }
            tftp_config(SEL_LOAD_LINUX_WRITE_FLASH, argv);
            argc= 3;
            setenv("autostart", "no");
            do_tftpb(cmdtp, 0, argc, argv);

#if defined (CFG_ENV_IS_IN_NAND)
            if (1) {
                unsigned int load_address = simple_strtoul(argv[1], NULL, 16);
                ranand_erase_write((u8 *)load_address, CFG_KERN_ADDR-CFG_FLASH_BASE, NetBootFileXferSize);
            }
#elif defined (CFG_ENV_IS_IN_SPI)
            if (1) {
                unsigned int load_address = simple_strtoul(argv[1], NULL, 16);
                raspi_erase_write((u8 *)load_address, CFG_KERN_ADDR-CFG_FLASH_BASE, NetBootFileXferSize);
            }
#else //CFG_ENV_IS_IN_FLASH
#if (defined (ON_BOARD_8M_FLASH_COMPONENT) || defined (ON_BOARD_16M_FLASH_COMPONENT)) && (defined (RT2880_ASIC_BOARD) || defined (RT2880_FPGA_BOARD) || defined (RT3052_MP1))
            //erase linux
            if (NetBootFileXferSize <= (0x400000 - (CFG_BOOTLOADER_SIZE + CFG_CONFIG_SIZE + CFG_FACTORY_SIZE))) {
                e_end = CFG_KERN_ADDR + NetBootFileXferSize;
                if (0 != get_addr_boundary(&e_end))
                    break;
                printf("Erase linux kernel block !!\n");
                printf("From 0x%X To 0x%X\n", CFG_KERN_ADDR, e_end);
                flash_sect_erase(CFG_KERN_ADDR, e_end);
            }
            else if (NetBootFileXferSize <= CFG_KERN_SIZE) {
                e_end = PHYS_FLASH_2 + NetBootFileXferSize - (0x400000 - (CFG_BOOTLOADER_SIZE + CFG_CONFIG_SIZE + CFG_FACTORY_SIZE));
                if (0 != get_addr_boundary(&e_end))
                    break;
                printf("Erase linux kernel block !!\n");
                printf("From 0x%X To 0x%X\n", CFG_KERN_ADDR, CFG_FLASH_BASE+0x3FFFFF);
                flash_sect_erase(CFG_KERN_ADDR, CFG_FLASH_BASE+0x3FFFFF);
                printf("Erase linux file system block !!\n");
                printf("From 0x%X To 0x%X\n", PHYS_FLASH_2, e_end);
                flash_sect_erase(PHYS_FLASH_2, e_end);
            }
#else
            if (NetBootFileXferSize <= (bd->bi_flashsize - (CFG_BOOTLOADER_SIZE + CFG_CONFIG_SIZE + CFG_FACTORY_SIZE))) {
                e_end = CFG_KERN_ADDR + NetBootFileXferSize;
                if (0 != get_addr_boundary(&e_end))
                    break;
                printf("Erase linux kernel block !!\n");
                printf("From 0x%X To 0x%X\n", CFG_KERN_ADDR, e_end);
                flash_sect_erase(CFG_KERN_ADDR, e_end);
            }
#endif
            else {
                printf("***********************************\n");
                printf("The Linux Image size is too big !! \n");
                printf("***********************************\n");
                break;
            }

            //cp.linux
            argc = 4;
            argv[0]= "cp.linux";
            do_mem_cp(cmdtp, 0, argc, argv);
#endif //CFG_ENV_IS_IN_FLASH

#ifdef DUAL_IMAGE_SUPPORT
            /* Don't do anything to the firmware upgraded in Uboot, since it may be used for testing */
            setenv("Image1Stable", "1");
            saveenv();
#endif

            //bootm bc050000
            argc= 2;
            sprintf(addr_str, "0x%X", CFG_KERN_ADDR);
            argv[1] = &addr_str[0];
            do_bootm(cmdtp, 0, argc, argv);            
            break;

#ifdef RALINK_CMDLINE
        case '4':
            printf("   \n%d: System Enter Boot Command Line Interface.\n", SEL_ENTER_CLI);
            printf ("\n%s\n", version_string);
            /* main_loop() can return to retry autoboot, if so just run it again. */ 
            /* 进入main_loop()函数*/
            for (;;) {                  
                main_loop ();
            }
            break;
#endif // RALINK_CMDLINE //
#ifdef RALINK_UPGRADE_BY_SERIAL
        case '7':
            printf("\n%d: System Load Boot Loader then write to Flash via Serial. \n", SEL_LOAD_BOOT_WRITE_FLASH_BY_SERIAL);
            argc= 1;
            setenv("autostart", "no");
            my_tmp = do_load_serial_bin(cmdtp, 0, argc, argv);
            NetBootFileXferSize=simple_strtoul(getenv("filesize"), NULL, 16);
#if defined(SMALL_UBOOT_PARTITION)
            if (NetBootFileXferSize > CFG_UBOOT_SIZE || my_tmp == 1) {
                printf("Abort: Bootloader is too big or download aborted!\n");
            }
#else
            if (NetBootFileXferSize > CFG_BOOTLOADER_SIZE || my_tmp == 1) {
                printf("Abort: Bootloader is too big or download aborted!\n");
            }
#endif
#if defined (CFG_ENV_IS_IN_NAND)
            else {
                ranand_erase_write((char *)CFG_LOAD_ADDR, 0, NetBootFileXferSize);
            }
#elif defined (CFG_ENV_IS_IN_SPI)
            else {
                raspi_erase_write((char *)CFG_LOAD_ADDR, 0, NetBootFileXferSize);
            }
#else //CFG_ENV_IS_IN_FLASH
            else {
                //protect off uboot
                flash_sect_protect(0, CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);

                //erase uboot
                printf("\n Erase U-Boot block !!\n");
                printf("From 0x%X To 0x%X\n", CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);
                flash_sect_erase(CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);

                //cp.uboot            
                argc = 4;
                argv[0]= "cp.uboot";
                do_mem_cp(cmdtp, 0, argc, argv);                       

                //protect on uboot
                flash_sect_protect(1, CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);
            }
#endif //CFG_ENV_IS_IN_FLASH

            //reset            
            do_reset(cmdtp, 0, argc, argv);
            break;
#endif // RALINK_UPGRADE_BY_SERIAL //
        case '8':
            printf("   \n%d: System Load UBoot to SDRAM via TFTP. \n", SEL_LOAD_BOOT_SDRAM);
            tftp_config(SEL_LOAD_BOOT_SDRAM, argv);
            argc= 3;
            setenv("autostart", "yes");
            do_tftpb(cmdtp, 0, argc, argv);
            break;

        case '9':
            printf("   \n%d: System Load Boot Loader then write to Flash via TFTP. \n", SEL_LOAD_BOOT_WRITE_FLASH);
            printf(" Warning!! Erase Boot Loader in Flash then burn new one. Are you sure?(Y/N)\n");
            confirm = getc();
            if (confirm != 'y' && confirm != 'Y') {
                printf(" Operation terminated\n");
                break;
            }
            tftp_config(SEL_LOAD_BOOT_WRITE_FLASH, argv);
            argc= 3;
            setenv("autostart", "no");
            do_tftpb(cmdtp, 0, argc, argv);
#if defined(SMALL_UBOOT_PARTITION)
            if (NetBootFileXferSize > CFG_UBOOT_SIZE) {
                printf("Abort: bootloader size %d too big! \n", NetBootFileXferSize);
            }
#else
            if (NetBootFileXferSize > CFG_BOOTLOADER_SIZE) {
                printf("Abort: bootloader size %d too big! \n", NetBootFileXferSize);
            }
#endif
#if defined (CFG_ENV_IS_IN_NAND)
            else {
                unsigned int load_address = simple_strtoul(argv[1], NULL, 16);
                ranand_erase_write((char *)load_address, 0, NetBootFileXferSize);
            }
#elif defined (CFG_ENV_IS_IN_SPI)
            else {
                unsigned int load_address = simple_strtoul(argv[1], NULL, 16);
                raspi_erase_write((char *)load_address, 0, NetBootFileXferSize);
            }
#else //CFG_ENV_IS_IN_FLASH
            else {
                //protect off uboot
                flash_sect_protect(0, CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);

                //erase uboot
                printf("\n Erase U-Boot block !!\n");
                printf("From 0x%X To 0x%X\n", CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);
                flash_sect_erase(CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);

                //cp.uboot            
                argc = 4;
                argv[0]= "cp.uboot";
                do_mem_cp(cmdtp, 0, argc, argv);                       

                //protect on uboot
                flash_sect_protect(1, CFG_FLASH_BASE, CFG_FLASH_BASE+CFG_BOOTLOADER_SIZE-1);
            }
#endif //CFG_ENV_IS_IN_FLASH

            //reset            
            do_reset(cmdtp, 0, argc, argv);
            break;
#ifdef RALINK_UPGRADE_BY_SERIAL
#if defined (CFG_ENV_IS_IN_NAND) || defined (CFG_ENV_IS_IN_SPI)
        case '0':
            printf("\n%d: System Load Linux then write to Flash via Serial. \n", SEL_LOAD_LINUX_WRITE_FLASH_BY_SERIAL);
            argc= 1;
            setenv("autostart", "no");
            my_tmp = do_load_serial_bin(cmdtp, 0, argc, argv);
            NetBootFileXferSize=simple_strtoul(getenv("filesize"), NULL, 16);

#if defined (CFG_ENV_IS_IN_NAND)
            ranand_erase_write((char *)CFG_LOAD_ADDR, CFG_KERN_ADDR-CFG_FLASH_BASE, NetBootFileXferSize);
#elif defined (CFG_ENV_IS_IN_SPI)
            raspi_erase_write((char *)CFG_LOAD_ADDR, CFG_KERN_ADDR-CFG_FLASH_BASE, NetBootFileXferSize);
#endif //CFG_ENV_IS_IN_FLASH

            //reset            
            do_reset(cmdtp, 0, argc, argv);
            break;
#endif
#endif // RALINK_UPGRADE_BY_SERIAL //


#ifdef RALINK_USB
#if defined (CFG_ENV_IS_IN_NAND) || defined (CFG_ENV_IS_IN_SPI)
        case '5':
            printf("\n%d: System Load Linux then write to Flash via USB Storage. \n", 5);

            argc = 2;
            argv[1] = "start";
            do_usb(cmdtp, 0, argc, argv);
            if( usb_stor_curr_dev < 0){
                printf("No USB Storage found. Upgrade F/W failed.\n");
                break;
            }

            argc= 5;
            argv[1] = "usb";
            argv[2] = "0";
            sprintf(addr_str, "0x%X", CFG_LOAD_ADDR);
            argv[3] = &addr_str[0];
            argv[4] = "root_uImage";
            setenv("autostart", "no");
            if(do_fat_fsload(cmdtp, 0, argc, argv)){
                printf("Upgrade F/W from USB storage failed.\n");
                break;
            }

            NetBootFileXferSize=simple_strtoul(getenv("filesize"), NULL, 16);
#if defined (CFG_ENV_IS_IN_NAND)
            ranand_erase_write((char *)CFG_LOAD_ADDR, CFG_KERN_ADDR-CFG_FLASH_BASE, NetBootFileXferSize);
#elif defined (CFG_ENV_IS_IN_SPI)
            raspi_erase_write((char *)CFG_LOAD_ADDR, CFG_KERN_ADDR-CFG_FLASH_BASE, NetBootFileXferSize);
#endif //CFG_ENV_IS_IN_FLASH

            //reset            
            do_reset(cmdtp, 0, argc, argv);
            break;
#endif
#endif // RALINK_UPGRADE_BY_USB //

        default:
            printf("   \nSystem Boot Linux via Flash.\n");
            do_bootm(cmdtp, 0, 1, argv);
            break;            
        } /* end of switch */   

        do_reset(cmdtp, 0, argc, argv);

    } /* end of else */

    /* NOTREACHED - no way out of command loop except booting */
}

board_init_r中调用了OperationSelect，打印出操作选择菜单：

void OperationSelect(void)
{
    printf("\nPlease choose the operation: \n");
    printf("   %d: Load system code to SDRAM via TFTP. \n", SEL_LOAD_LINUX_SDRAM);
    printf("   %d: Load system code then write to Flash via TFTP. \n", SEL_LOAD_LINUX_WRITE_FLASH);
    printf("   %d: Boot system code via Flash (default).\n", SEL_BOOT_FLASH);
#ifdef RALINK_CMDLINE
    printf("   %d: Entr boot command line interface.\n", SEL_ENTER_CLI);
#endif // RALINK_CMDLINE //
#ifdef RALINK_UPGRADE_BY_SERIAL
    printf("   %d: Load Boot Loader code then write to Flash via Serial. \n", SEL_LOAD_BOOT_WRITE_FLASH_BY_SERIAL);
#endif // RALINK_UPGRADE_BY_SERIAL //
    printf("   %d: Load Boot Loader code then write to Flash via TFTP. \n", SEL_LOAD_BOOT_WRITE_FLASH);
}