hisi-hi3519v101-demb.dts

/*
 * Copyright (c) 2013-2014 Linaro Ltd.
 * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see .
 *
 */

/dts-v1/;
#include "hisi-hi3519v101.dtsi"

/ {
    model = "Hisilicon HI3519V101 DEMO Board";
    compatible = "hisilicon,hi3519v101";

    cpus {
        #address-cells = <1>;
        #size-cells = <0>;
        enable-method = "hisilicon,hi3519-smp";

        cpu@0 {
            compatible = "arm,cortex-a7";
            device_type = "cpu";
            clock-frequency = ;
            reg = <0>;
            cci-control-port = <&cci_control0>;
        };

        /*cpu@100 {
            compatible = "arm,cortex-a17";
            device_type = "cpu";
            clock-frequency = ;
            reg = <0x100>;
            cci-control-port = <&cci_control1>;
        };*/
    };

    memory {
        device_type = "memory";
        reg = <0x80000000 0x40000000>;
    };
};

&uart0 {
    status = "okay";
};

&dual_timer0 {
    status = "okay";
};

&i2c_bus0 {
    status = "okay";
};

&i2c_bus1 {
    status = "okay";
};

&i2c_bus2 {
    status = "okay";
};

&i2c_bus3 {
    status = "okay";
};

&spi_bus0 {
    status = "okay";

    spidev@0 {
        compatible = "rohm,dh2228fv";
        reg = <0>;
        pl022,interface = <0>;
        pl022,com_mode = <0>;
        spi-max-frequency = <24000000>;
    };

};

&spi_bus1 {
    status = "okay";

    spidev@0 {
        compatible = "rohm,dh2228fv";
        reg = <0>;
        pl022,interface = <0>;
        pl022,com_mode = <0>;
        spi-max-frequency = <24000000>;
    };

    spidev@1 {
        compatible = "rohm,dh2228fv";
        reg = <1>;
        pl022,interface = <0>;
        pl022,com_mode = <0>;
        spi-max-frequency = <24000000>;
    };
};

&spi_bus2 {
    status = "okay";

    spidev@0 {
        compatible = "rohm,dh2228fv";
        reg = <0>;
        pl022,interface = <0>;
        pl022,com_mode = <0>;
        spi-max-frequency = <24000000>;
    };
};

&spi_bus3 {
    status = "okay";

    spidev@0 {
        compatible = "rohm,dh2228fv";
        reg = <0>;
        pl022,interface = <0>;
        pl022,com_mode = <0>;
        spi-max-frequency = <24000000>;
    };
};

&hisfc {
    hi_sfc {
        compatible = "jedec,spi-nor";
        reg = <0>;
        spi-max-frequency = <160000000>;
        m25p,fast-read;
    };

};

&hisnfc {
    hinand {
        compatible = "jedec,spi-nand";
        reg = <0>;
        spi-max-frequency = <160000000>;
    };
};

&hinfc {
    hinand {
        compatible = "jedec,nand";
        reg = <0>;
        nand-max-frequency = <200000000>;
    };
};

&mmc0 {
    status = "okay";
};

&mmc1 {
    status = "okay";
};

&mmc2 {
    status = "okay";
};

&mdio {
    ethphy: ethernet-phy@1 {
        reg = <1>;
    };
};

&higmac {
    phy-handle = <ðphy>;
    phy-mode = "rgmii";
};

&gpio_chip0 {
    status = "okay";
};

&gpio_chip1 {
    status = "okay";
};

&gpio_chip2 {
    status = "okay";
};

&gpio_chip3 {
    status = "okay";
};

&gpio_chip4 {
    status = "okay";
};

&gpio_chip5 {
    status = "okay";
};

&gpio_chip6 {
    status = "okay";
};

&gpio_chip7 {
    status = "okay";
};

&gpio_chip8 {
    status = "okay";
};

&gpio_chip9 {
    status = "okay";
};

&gpio_chip10 {
    status = "okay";
};

&gpio_chip11 {
    status = "okay";
};

&gpio_chip12 {
    status = "okay";
};

&gpio_chip13 {
    status = "okay";
};

&gpio_chip14 {
    status = "okay";
};

&gpio_chip16 {
    status = "okay";
};