FPGA-SDRAM设计学习（二）具体操作详细介绍（文档阅读）

学习内容

SDRAM的具体操作详细介绍

学习所需

IS42S1_datasheet（给出网盘，失效留言）

引脚说明

A0-A11

A0-A11是在活动期间采样的地址输入(行地址A0-A11)和读/写命令(a0 - a7与A10定义自动充电)。在预充电命令期间采样A10，以确定是否要对所有BANK进行预充电(A10高)或由BA0、BA1(低)选择BANK。地址输入还在加载模式寄存器命令期间提供操作代码。
总结：

• 地址在ACTIVE/READ/WRITE时有效
• A10可用来表示预充电
• 地址也可作为模式寄存器的配置值

BA0 and BA1

Bank Select Address (BA0 and BA1) defines which bankthe ACTIVE, READ, WRITE or PRECHARGE commandis being applied.
BANK选择地址(BA0和BA1)定义了正在应用活动、读、写或预充命令的BANK。CAS与RAS和WE一起组成设备命令。

CKE

The CKE input determines whether the CLK input is en-abled. The next rising edge of the CLK signal will be valid when is CKE HIGH and invalid when LOW. When CKE is LOW, the device will be in either power-down mode, CLOCK SUSPEND mode, or SELF-REFRESH mode. CKE is an asynchronous input.
CKE输入决定了CLK输入是否被加载。CLK信号的下一个上升沿在CKE高时有效，在低时无效。当CKE值较低时，设备将处于断电模式、时钟暂停模式或自刷新模式。CKE是一个异步输入。

CLK

CLK is the master clock input for this device. Except for CKE, all inputs to this device are acquired in synchroniza-tion with the rising edge of this pin.
CLK是这个设备的主时钟输入。除CKE外，该装置的所有输入均与该引脚的上升沿同步。
总结：

• CKE输入决定了CLK输入是否被加载
• CKE是一个异步输入
• 所有输入均与CLK的上升沿同步

CS and DQ0 to DQ15

The CS input determines whether command input is en-abled within the device. Command input is enabled when CS is LOW, and disabled with CS is HIGH. The device remains in the previous state when CS is HIGH. DQ0 to DQ15 are DQ pins. DQ through these pins can be controlled in byte units using the LDQM and UDQM pins.
CS输入决定命令输入是否在设备内部被加载。命令输入在CS低时启用，在CS高时禁用。当CS较高时，设备保持前一状态。DQ0到DQ15是DQ引脚。通过这些引脚可以使用LDQM和UDQM引脚以字节单位控制DQ。

LDQM and UDQM

LDQM and UDQM control the lower and upper bytes of the DQ buffers. In read mode, LDQM and UDQM control the output buffer. When LDQM or UDQM is LOW, the corresponding buffer byte is enabled, and when HIGH,disabled. The outputs go to the HIGH Impedance State when LDQM/UDQM is HIGH. This function corresponds to OE in conventional DRAMs. In write mode, LDQM and UDQM control the input buffer. When LDQM or UDQM is LOW, the corresponding buffer byte is enabled, and data can be written to the device. When LDQM or UDQM is HIGH, input data is masked and cannot be written to the device.
LDQM和UDQM控制DQ缓冲区的上下字节。在读取模式下，LDQM和UDQM控制输出缓冲区。当LDQM或UDQM低时，相应的缓冲区字节是启用的，而当高时，则禁用。当LDQM/UDQM高时，输出进入高阻抗状态。这个函数相当于传统dram中的OE。在写模式下，LDQM和UDQM控制输入缓冲区。当LDQM或UDQM较低时，将启用相应的缓冲区字节，可以将数据写入设备。当LDQM或UDQM很高时，输入数据被屏蔽，不能写入设备。
总结：

• 命令输入在CS低时启用，在CS高时禁用。当CS较高时，设备保持前一状态
• LDQM和UDQM控制DQ缓冲区的传输字节，在读取和写入模式下不相同

RAS, in conjunction with CAS and WE , forms the device command.
RAS与CAS和WE一起组成设备命令。

VDD and GND

V DDq is the output buffer power supply.
V DD is the device internal power supply.
GND q is the output buffer ground.
GND is the device internal ground.
V DDq为输出缓冲电源。
vdd是设备内部的电源。
GND q是输出缓冲地。
GND是设备内部接地。

操作说明

READ

The READ command selects the bank from BA0, BA1 inputs and starts a burst read access to an active row. Inputs A0-A7 provides the starting column location. When A10 is HIGH, this command functions as an AUTO PRECHARGE command. When the auto precharge is selected, the row being accessed will be precharged at the end of the READ burst. The row will remain open for subsequent accesses when AUTO PRECHARGE is not selected. DQ’s read data is subject to the logic level on the DQM inputs two clocks earlier. When a given DQM signal was registered HIGH, the corresponding DQ’s will be High-Z two clocks later. DQ’s will provide valid data when the DQM signal was registered LOW.
READ命令从BA0、BA1输入中选择BANK，并启动对活动行的突发读访问。输入A0-A7提供起始列位置。当A10高时，此命令作为自动预充命令。当选择自动预充电时，被访问的行将在READ burst结束时进行预充电。当没有选择自动预充电时，这一行将保持打开状态，供后续访问。
DQ的读数据服从于两个时钟之前的DQM输入的逻辑级别。当一个给定的DQM信号被注册为高时，相应的DQ将在 两个时钟 之后成为高z。当DQM信号被注册为低信号时，DQ将提供有效的数据。
总结：

• 读命令时，选择BANK。
• 开始一个burst的读
• 地址的低8位为列地址。
• A10指示在读完成后是否要自动预充电。
• 同时指明了DQM和读出来的时序关系。

WRITE

A burst write access to an active row is initiated with the WRITE command. BA0, BA1 inputs selects the bank, and the starting column location is provided by inputs A0-A7. Whether or not AUTO-PRECHARGE is used is determined by A10. The row being accessed will be precharged at the end of the WRITE burst, if AUTO PRECHARGE is selected. If AUTO PRECHARGE is not selected, the row will remain open for subsequent accesses. A memory array is written with corresponding input data on DQ’s and DQM input logic level appearing at the same time. Data will be written to memory when DQM signal is LOW. When DQM is HIGH, the corresponding data inputs will be ignored, and a WRITE will not be executed to that byte/column location.
使用写命令启动对活动行的突发写访问。BA0、BA1输入选择BANK，起始列位置由输入A0-A7提供。是否使用自动预充由A10决定。如果选择了自动预充电，被访问的行将在写突发结束时被预充电。如果没有选择自动预充电，这一行将为后续访问保持打开状态。
在DQ和DQM输入逻辑层上同时写入相应的输入数据。当DQM信号较低时，数据将被写入内存。当DQM较高时，相应的数据输入将被忽略，并且不会对该字节/列位置执行写操作。
总结：

• 写命令时，选择BANK
• 开始一个burst的写
• 地址的低8位为列地址。
• A10指示在写完成后是否要自动预充电。
• 指明了DQ和数据时序关系。同时有效

PRECHARGE

The PRECHARGE command is used to deactivate the open row in a particular bank or the open row in all banks. BA0, BA1 can be used to select which bank is precharged or they are treated as “Don’t Care”. A10 determined whether one or all banks are precharged. After execut-ing this command, the next command for the selected banks(s) is executed after passage of the period t RP , which is the period required for bank precharging. Once a bank has been precharged, it is in the idle state and must be activated prior to any READ or WRITE commands being issued to that bank.
PRECHARGE命令用于停用特定BANK中的开行或所有BANK中的开行。BA0、BA1可以用来选择哪家BANK是预充电的，或者它们被视为“不在乎”。A10决定是一个BANK还是所有BANK都要预充电。执行此命令后，所选BANK的下一个命令将在时间t RP(BANK预充所需的时间)之后执行。一旦BANK被预充了电，它就处于空闲状态，必须在向该BANK发出任何读或写命令之前激活它。
总结：

• 可通过A10、BA0和BA1选择全部BANK或某一个BANK
• 预充电命令后，必须等待TRP时间。
• 预示充电后处于idle状态。必须active后，才能读和写

AUTO PRECHARGE

The AUTO PRECHARGE function ensures that the pre-charge is initiated at the earliest valid stage within a burst.This function allows for individual-bank precharge without requiring an explicit command. A10 to enables the AUTO PRECHARGE function in conjunction with a specific READ or WRITE command. For each individual READ or WRITE command, auto precharge is either enabled or disabled.
AUTO PRECHARGE does not apply except in full-page burst mode. Upon completion of the READ or WRITE burst, a precharge of the bank/row that is addressed is automatically performed.
自动预充电功能确保在最短有效时间内启动预充电。这个功能允许特定的BANK预充电，而不需要一个明确的命令。A10启用自动预充功能与特定的读或写命令。对于每个单独的读或写命令，自动预充电是启用或禁用的。
自动预充不适用在全页突发模式。在完成读或写突发事件后，将自动对所寻址的银行/行进行预充电。
总结：

• A10决定
• 每个读和写操作独立决定
• 全页模式不支持自动预充电

AUTO REFRESH COMMAND

This command executes the AUTO REFRESH operation. The row address and bank to be refreshed are automaticallygenerated during this operation. The stipulated period (t rc ) is required for a single refresh operation, and no other commands can be executed during this period. This command is executed at least 4096 times every 64ms. During an AUTO REFRESH command, address bits are “Don’t Care”. This command corresponds to CBR Auto-refresh.
此命令执行自动刷新操作。将在此操作期间自动生成要刷新的行地址和BANK。单个刷新操作需要规定的周期(trc)，在此期间不能执行任何其他命令。此命令每64ms至少执行4096次。在自动刷新命令期间，地址位是“不关心”的。此命令对应于CBR自动刷新。
总结：

• 行列地址自动生成
• 需要TRC时间，此时不能有其他命令
• 3.64ms必须至少4096次

SELF REFRESH

During the SELF REFRESH operation, the row address tobe refreshed, the bank, and the refresh interval are generated automatically internally. SELF REFRESH can be used to retain data in the SDRAM without external clocking, even if the rest of the system is powered down. The SELF REFRESH operation is started by dropping the CKE pin from HIGH to LOW. During the SELF REFRESH operation all other inputs to the SDRAM become “Don’t Care”. The device must remain in self refresh mode for a minimum period equal to t ras or may remain in self refresh mode for an indefinite period beyond that. The SELF-REFRESH operation continues as long as the CKE pin remains LOW and there is no need for external control of any other pins.The next command cannot be executed until the device internal recovery period (t rc ) has elapsed. Once CKE goes HIGH, the NOP command must be issued (minimum of two clocks) to provide time for the completion of any internal refresh in progress. After the self-refresh, since it is impossible to determine the address of the last row to be refreshed, an AUTO-REFRESH should immediately be performed for all addresses.

在SELF REFRESH操作期间，将在内部自动生成要刷新的行地址、BANK和刷新间隔。可以使用SELF REFRESH来保留SDRAM中的数据，而不需要外部时钟，即使系统的其余部分已经关闭。自我刷新操作是通过将CKE引脚从高到低开始的。在SELF REFRESH操作期间，SDRAM的所有其他输入都变为“Don 't Care”。设备必须在至少等于t ras的时间内保持自刷新模式，或者可以在不确定的时间内保持自刷新模式。只要CKE引脚保持低，并且不需要外部控制任何其他引脚，就可以继续进行自我刷新操作。直到设备内部恢复期(trc)结束后才能执行下一个命令。一旦CKE升高，必须发出NOP命令(至少两个时钟)，为正在进行的任何内部刷新的完成提供时间。自刷新之后，由于不可能确定要刷新的最后一行的地址，因此应该立即对所有地址执行自动刷新。
总结：

• 保留SDRAM中的数据，不需要外部时钟

BURST TERMINATE（突然终止）

The BURST TERMINATE command forcibly terminates the burst read and write operations by truncating either fixed-length or full-page bursts and the most recently registered READ or WRITE command prior to the BURST TERMINATE.
BURST TERMINATE命令强制终止突发的读写操作，方法是在突发终止之前截断固定长度或整页突发以及最近注册的读或写命令。

COMMAND INHIBIT（命令禁止）

COMMAND INHIBIT prevents new commands from being executed. Operations in progress are not affected, apart from whether the CLK signal is enabled
命令禁止阻止新命令的执行。除CLK信号是否已启用外，正在进行的操作不受影响

NO OPERATION（空操作）

When CS is low, the NOP command prevents unwanted commands from being registered during idle or wait states.

LOAD MODE REGISTER（配置模式寄存器 A0-A11有效）

During the LOAD MODE REGISTER command the mode register is loaded from A0-A11. This command can only be issued when all banks are idle.
在加载模式寄存器命令期间，模式寄存器从A0-A11加载。此命令只能在所有银行空闲时发出。

ACTIVE COMMAND

When the ACTIVE COMMAND is activated, BA0, BA1 inputs selects a bank to be accessed, and the address inputs on A0-A11 selects the row. Until a PRECHARGE command is issued to the bank, the row remains open for accesses.
激活活动命令时，BA0、BA1输入选择要访问的BANK，A0-A11上的地址输入选择该行。在向银行发出PRECHARGE命令之前，该行一直为访问打开。

指令

对应状态的可操作指令