rtc预分频

rtc 预分频时钟设置会有部分计数有延时。

会造成rtc"抖动"即某些特定情况不准确。

For example, if PREFRAC bit 14 is a one (representing the fraction 1/2), then half of the

cycles counted by the 13-bit counter need to be longer. When there is a 1 in the LSB of
the Fraction Counter, the logic causes every alternate count (whenever the LSB of the
Fraction Counter=1) to be extended by one PCLK, evenly distributing the pulse widths.
Similarly, a one in PREFRAC bit 13 (representing the fraction 1/4) will cause every fourth
cycle (whenever the two LSBs of the Fraction Counter=10) counted by the 13-bit counter
to be longer。