mips 指令简介

Machine language vs. assembly language
• Real machine language level programming means to handle the bit encodings of machine instructions 
Example (MIPS CPU: addition $t0 ← $t0 + $t1): 1000010010100000000100000

 • Assembly language introduces symbolic names (mnemonics) for machine instructions and makes programming less error-prone: 
Example (MIPS CPU: addition $t0 ← $t0 + $t1): add $t0, $t0, $t1 
• An assembler translates mnemonics into machine instructions – Normally: mnemonic 1:1 ←→ machine instruction 
– Also: the assembler supports pseudo instructions which are translated into series of machine instructions (mnemonic 1:n ←→ machine instruction)

mips是RISC的鼻祖,每条指令固定的占用4个字节,指令格式分为以下几类:
  • R-type instructions
Converting an R mnemonic into the equivalent binary machine code is performed in the following way:
opcode rs rt rd shift (shamt) funct
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
All R-type instructions use opcode 000000.

  • I-type instructions
opcode rs rt IMM
6 bits 5 bits 5 bits 16 bits
All opcodes except 000000, 00001x, and 0100xx are used for I-type instructions.

  • J-type instructions
Opcode Pseudo-Address
J-type instructions use opcodes 00001x.

  • coprocessor Instructions

MIPS processors all have two standard coprocessors, CP0 and CP1. CP0 processes various kinds of program exceptions. CP1 is a floating point processor. The MIPS architecture makes allowance for future inclusion of two additional coprocessors, CP2 and CP3.

All coprocessor instructions instructions use opcodes 0100xx.



mips指令的作用主要分为以下几大类:
1. load ,store, and Data Movement
Typical for the RISC design, MIPS is a load-store architecture:
 – Memory is accessed only by explicit load and store instructions 
– Computation (e.g., arithmetics) reads operands from registers and writes results back into registers

• MIPS: load word/halfword/byte at address a into target register r (r ← (a)): 

• MIPS: store word/halfword/byte in register r at address a (a ← r):

MIPS can move data between registers directly (no memory access involved)

除了显示的load-store可访问内存外,其他的操作都是在寄存器之间进行的,注意这里的内存仅仅指:32个通用寄存器,一个pc寄存器,一个HI和LO寄存器,另外还有协处理器自己的寄存器,除此之外所有的都看做外部内存,包括设备寄存器,即通过总线接口单元BIU单元访问的都是外部内存,这时访问需要耗费较多cpu时间


 2.arithmetic instructions

3.shift/rotate instructions

4.logical instructions
• MIPS CPUs provide instructions to compute common boolean functions

5.comparison instructions
• Compare the values of two registers (or one register and a constant) 
– Comparison successful: r ← 1 fails: r ← 0

 6.branch and jump instructions

7.special  instructions
nop
ssnop
sync
cache

另外在汇编程序中,常见一些伪指令,伪指令的目的是方便程序编写
The assembler translates pseudo instructions into real MIPS instructions


感悟:现在终于知道为啥计算机叫计算机了,本质上就是一系列的计算,操作码+操作数,load+store可将外部内存看做计算数据的来源和计算结果的仓库,另外数据还可以改变计算执行的序列,仅此而已。

引申:java源码首先被编译为class字节码,其实就是一些抽象机器指令序列,本质上还是操作码+操作数,只是这些抽象指令不是在具体机器上去执行的,而是在虚拟机上执行的,虚拟机取出一条抽象指令作为数据,拆分出操作码,操作码作为数据影响虚拟机的执行,根据操作码跳转到虚拟机对应的代码序列中,然后将操作数作为数据参与计算,这样就完成执行了一条抽象指令,然后循环取出下一条抽象指令执行,这就是java虚拟机的实现原理。

虚拟机程序:

loop(抽象指令=read(class文件))

{

    操作码=getop(抽象指令);

    操作数=getdata(抽象指令);

    switch(操作码)

     {

           case 加法:

            add 操作数; 

            break;

            case 减法:

            sub 操作数;

            break;

            ....

      }

}


参考文档:

《MIPS32® Architecture For Programmers Volume II: The MIPS32® Instruction Set》

《MIPS32-指令集-简表.pdf》

http://www.eecs.harvard.edu/~ellard/Courses/cs50-asm.pdf
http://www.cs.unibo.it/~solmi/te ... LanguageProgDoc.pdf
http://www.inf.uni-konstanz.de/d ... /download/rs-05.pdf
https://en.wikibooks.org/wiki/MIPS_Assembly/Instruction_Formats



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