[原创]FPGA JTAG工具设计(二)

经过前期打样

基于FT2232H的JTAG &UART板级已经初步形成

在Viado环境和ISE(13.2+)环境可以使用

速度支持10MHz/15MHz/30MHz

在ISE iMpact下载 

可进行JTAG 时钟切换

// *** BATCH CMD : setCable -target "digilent_plugin DEVICE=SN:210203367162 FREQUENCY=30000000"
INFO:iMPACT - Digilent Plugin: Plugin Version: 2.4.4
INFO:iMPACT - Digilent Plugin: Opening device : "SN:201713120014".
INFO:iMPACT - Digilent Plugin: User Name: JtagSmt1
INFO:iMPACT - Digilent Plugin: Product Name: Digilent JTAG-SMT1
INFO:iMPACT - Digilent Plugin: Serial Number: 201713120014
INFO:iMPACT - Digilent Plugin: Product ID: 30800151
INFO:iMPACT - Digilent Plugin: Firmware Version: 0109
INFO:iMPACT - Digilent Plugin: JTAG Port Number: 0
INFO:iMPACT - Digilent Plugin: JTAG Clock Frequency: 30000000 Hz
INFO:iMPACT - Current time: 2017/12/31 20:04:03
// *** BATCH CMD : Program -p 2 
PROGRESS_START - Starting Operation.
Warning: Chain frequency (20000000) is less than the current cable speed (30000000).
 Adjust to cable speed (20000000).
Maximum TCK operating frequency for this device chain: 20000000.
Validating chain...
Boundary-scan chain validated successfully.
2: Device Temperature: Current Reading:   61.70 C, Min. Reading:   57.76 C, Max. Reading:   62.19 C
2: VCCINT Supply: Current Reading:   0.958 V, Min. Reading:   0.949 V, Max. Reading:   0.976 V
2: VCCAUX Supply: Current Reading:   1.790 V, Min. Reading:   1.784 V, Max. Reading:   1.796 V
INFO:iMPACT - Creating XC7Z020 device.
PROGRESS_START - Starting Operation.
'2': Programming device...
 Match_cycle = NoWait.
Match cycle: NoWait
 LCK_cycle = NoWait.
LCK cycle: NoWait
done.
INFO:Cse - Status register values:
INFO:Cse - 0011 1111 1111 1110 0000 1000 0110 0010 
INFO:Cse - '2': Completed downloading bit file to device.
INFO:Cse - '2': Programming completed successfully.
PROGRESS_END - End Operation.
Elapsed time =      2 sec.
 Match_cycle = NoWait.
Match cycle: NoWait
 LCK_cycle = NoWait.
LCK cycle: NoWait
INFO:iMPACT - '2': Checking done pin....done.
'2': Programmed successfully.

　　

 

转载于:https://www.cnblogs.com/ifpga/p/8158864.html