imx6 ECSPI Config Register 中SS_CTL的使用

1、采用 slave 模式

2、SS_CTL 配置为0

imx6 中关于该位的配置说明如下：

 

其中：

In slave mode - an SPI burst is completed when the number of bits received in the shift register is
equal to (BURST LENGTH + 1). Only the n least-significant bits (n = BURST LENGTH[4:0] + 1) of the
first received word are valid. All bits subsequent to the first received word in RXFIFO are valid.

关注后面两句：

如果 bpw 设置为8 那么接收到的第一个字是0x00000008，后面所有数据都必须把一个字填满。

如发送的数据为  0x01 0x02 0x03 0x04 0x05

刚接收RXFIFO中的两个字为 0x00000001 0x02030405