python verilog顶层连线_RTL顶层自动连线的秘密武器：Emacs verilog-mode介绍（VIM也可以用）...

RTL顶层自动连线听说过吗？想学吗？我们今天就来介绍自动连线的神器——emacs verilog-mode。

emacs是什么？

江湖流传版：传说中神的编辑器。

维基百科版：Emacs(Editor MACroS，宏编辑器)，最初由Richard Stallman于1975年在MIT协同Guy Lewis Steele Jr.共同完成。

verilog-mode是什么

官网的介绍

Verilog-mode.el is the extremely popular free Verilog mode for Emacs which provides context-sensitive highlighting, auto indenting, and provides macro expansion capabilities to greatly reduce Verilog coding time. It supports AUTOs and indentation in Emacs for traditional Verilog (1394-2005), the Open Verification Methodology (OVM) and SystemVerilog (1800-2005/1800-2009).

Recent versions allow you to insert AUTOS in non-AUTO designs, so IP interconnect can be easily modified. You can also expand SystemVerilog ".*" port instantiations, to see what ports will be connected by the simulators.

简单点说就是支持Verilog、SystemVerilog(包括UVM)的emacs语法高亮文件。