RK3568 Mipi屏幕时序初始化

##1、 屏幕初始化时序厂家提供如下;
//========== JD9365+BOE10.1 initial setting ==========//
Display Resolution:800*1280
params->dsi.vertical_sync_active(VS)=4
params->dsi.vertical_backporch(VBP)=8
params->dsi.vertical_frontporch(VFP)=24
params->dsi.horizontal_sync_active(HS)=18
params->dsi.horizontal_backporch(HBP)=18
params->dsi.horizontal_frontporch(HFP)=18
params->dsi.PLL_CLOCK=405Mbps(203MHZ)

LCD_nReset=1;
Delayms(5}},
LCD_nReset=0;
Delayms(10}},
LCD_nReset=1;
Delayms(120}},

//======initial code==========//
//Page0
{0xE0,1,{0x00}},
{0xE1,1,{0x93}},
{0xE2,1,{0x65}},
{0xE3,1,{0xF8}},
{0x80,1,{0x03}},//0X03:4-LANE;0X02:3-LANE;0X01:2-LANE

//Page1
{0xE0,1,{0x01}},
{0x00,1,{0x00}},
{0x01,1,{0x6F}},
{0x03,1,{0x00}},
{0x04,1,{0xA0}},
{0x0C,1,{0x74}},

//Set Gamma Power, VGMP,VGMN,VGSP,VGSN
{0x17,1,{0x00}},
{0x18,1,{0xAF}},
{0x19,1,{0x01}},
{0x1A,1,{0x00}},
{0x1B,1,{0xAF}},
{0x1C,1,{0x01}},

//Set Gate Power
{0x1F,1,{0x3E}},
{0x20,1,{0x28}},
{0x21,1,{0x28}},
{0x22,1,{0x7E}},

{0x24,1,{0xFE}},//modify20200324

{0x35,1,{0x26}},
{0x37,1,{0x09}},

//SET RGBCYC
{0x38,1,{0x04}},
{0x39,1,{0x00}},
{0x3A,1,{0x01}},
{0x3C,1,{0x7C}},
{0x3D,1,{0xFF}},
{0x3E,1,{0xFF}},
{0x3F,1,{0x7F}},

//Set TCON
{0x40,1,{0x06}},
{0x41,1,{0xA0}},
{0x42,1,{0x81}},
{0x43,1,{0x08}},
{0x44,1,{0x0B}},
{0x45,1,{0x28}},

//--- power voltage  ----//
//{0x4A,1,{0x35}},//bist
{0x55,1,{0x02}},//modify20200730
{0x57,1,{0x69}},
{0x59,1,{0x0A}},
{0x5A,1,{0x28}},
{0x5B,1,{0x14}},

//--- Gamma  ----//
{0x5D,1,{0x7C}},              
{0x5E,1,{0x65}},      
{0x5F,1,{0x55}},    
{0x60,1,{0x47}},    
{0x61,1,{0x43}},    
{0x62,1,{0x32}},    
{0x63,1,{0x34}},    
{0x64,1,{0x1C}},    
{0x65,1,{0x33}},    
{0x66,1,{0x31}},    
{0x67,1,{0x30}},    
{0x68,1,{0x4E}},    
{0x69,1,{0x3C}},    
{0x6A,1,{0x44}},    
{0x6B,1,{0x35}},    
{0x6C,1,{0x31}},    
{0x6D,1,{0x23}},    
{0x6E,1,{0x11}},    
{0x6F,1,{0x00}},    
{0x70,1,{0x7C}},    
{0x71,1,{0x65}},    
{0x72,1,{0x55}},    
{0x73,1,{0x47}},    
{0x74,1,{0x43}},    
{0x75,1,{0x32}},    
{0x76,1,{0x34}},    
{0x77,1,{0x1C}},    
{0x78,1,{0x33}},    
{0x79,1,{0x31}},    
{0x7A,1,{0x30}},    
{0x7B,1,{0x4E}},    
{0x7C,1,{0x3C}},    
{0x7D,1,{0x44}},    
{0x7E,1,{0x35}},    
{0x7F,1,{0x31}},    
{0x80,1,{0x23}},    
{0x81,1,{0x11}},    
{0x82,1,{0x00}},   

//Page2
{0xE0,1,{0x02}},

//GIP_L Pin mapping    
{0x00,1,{0x1E}},
{0x01,1,{0x1E}},
{0x02,1,{0x41}},
{0x03,1,{0x41}},
{0x04,1,{0x43}},
{0x05,1,{0x43}},
{0x06,1,{0x1F}},
{0x07,1,{0x1F}},
{0x08,1,{0x1F}},
{0x09,1,{0x1F}},
{0x0A,1,{0x1E}},
{0x0B,1,{0x1E}},
{0x0C,1,{0x1F}},
{0x0D,1,{0x47}},
{0x0E,1,{0x47}},
{0x0F,1,{0x45}},
{0x10,1,{0x45}},
{0x11,1,{0x4B}},
{0x12,1,{0x4B}},
{0x13,1,{0x49}},
{0x14,1,{0x49}},
{0x15,1,{0x1F}},
{0x16,1,{0x1E}},
{0x17,1,{0x1E}},
{0x18,1,{0x40}},
{0x19,1,{0x40}},
{0x1A,1,{0x42}},
{0x1B,1,{0x42}},
{0x1C,1,{0x1F}},
{0x1D,1,{0x1F}},

//GIP_R Pin mapping 
{0x1E,1,{0x1F}},
{0x1F,1,{0x1F}},
{0x20,1,{0x1E}},
{0x21,1,{0x1E}},
{0x22,1,{0x1F}},
{0x23,1,{0x46}},
{0x24,1,{0x46}},
{0x25,1,{0x44}},
{0x26,1,{0x44}},
{0x27,1,{0x4A}},
{0x28,1,{0x4A}},
{0x29,1,{0x48}},
{0x2A,1,{0x48}},
{0x2B,1,{0x1F}},

//GIP_L_GS Pin mapping
{0x2C,1,{0x1F}},
{0x2D,1,{0x1F}},
{0x2E,1,{0x00}},
{0x2F,1,{0x00}},
{0x30,1,{0x00}},
{0x31,1,{0x00}},
{0x32,1,{0x1E}},
{0x33,1,{0x1E}},
{0x34,1,{0x35}},
{0x35,1,{0x1F}},
{0x36,1,{0x15}},
{0x37,1,{0x15}},
{0x38,1,{0x1F}},
{0x39,1,{0x08}},
{0x3A,1,{0x08}},
{0x3B,1,{0x0A}},
{0x3C,1,{0x0A}},
{0x3D,1,{0x04}},
{0x3E,1,{0x04}},
{0x3F,1,{0x06}},
{0x40,1,{0x06}},
{0x41,1,{0x1F}},

//GIP_R_GS Pin mapping
{0x42,1,{0x1F}},
{0x43,1,{0x1F}},
{0x44,1,{0x01}},
{0x45,1,{0x01}},
{0x46,1,{0x01}},
{0x47,1,{0x01}},
{0x48,1,{0x1E}},
{0x49,1,{0x1E}},
{0x4A,1,{0x35}},
{0x4B,1,{0x1F}},
{0x4C,1,{0x15}},
{0x4D,1,{0x15}},
{0x4E,1,{0x1F}},
{0x4F,1,{0x09}},
{0x50,1,{0x09}},
{0x51,1,{0x0B}},
{0x52,1,{0x0B}},
{0x53,1,{0x05}},
{0x54,1,{0x05}},
{0x55,1,{0x07}},
{0x56,1,{0x07}},
{0x57,1,{0x1F}},

//GIP Timing  
{0x58,1,{0x40}},
{0x5B,1,{0x30}},
{0x5C,1,{0x03}},
{0x5D,1,{0x30}},
{0x5E,1,{0x01}},
{0x5F,1,{0x02}},
{0x63,1,{0x14}},
{0x64,1,{0x6A}},
{0x67,1,{0x73}},
{0x68,1,{0x05}},
{0x69,1,{0x14}},
{0x6A,1,{0x6A}},
{0x6B,1,{0x0C}},
{0x6C,1,{0x00}},
{0x6D,1,{0x00}},
{0x6E,1,{0x00}},
{0x6F,1,{0x88}},

//Page4
{0xE0,1,{0x04}},
{0x02,1,{0x23}},//20200330 modify
{0x09,1,{0x11}},
{0x0E,1,{0x48}},
{0x36,1,{0x49}},



//SLP OUT
{0x11,0,{0x00}},  	
Delayms(120}},

//DISP ON
{0x29,0,{0x00}},   
Delayms(5}},

//TE
{0x35,0,{0x00}},  

## 2、使用脚本转换为设备树格式,参考其他设备格式

'''
panel-init-sequence = [
    15 00 02 80 77
    15 00 02 81 77
    15 00 02 82 77
    15 00 02 83 77
    15 00 02 84 77
    15 00 02 85 77
    15 00 02 86 77
    39 00 0D C3 01 66 13 23 00 66 85 33 20 38 38 00
    05 64 01 11
    05 14 01 29
];

15 00 02 80 77
 |  |  | |  |
 |  |  | |  数据
 |  |  | | 寄存器地址
 |  |  数据长度
 |  延时
 命令类型(0x05: 单字节数据 0x15: 双字节数据 0x39: 多字节数据)
'''

def gen(path):
    f=open(path,'r')
    lines=f.readlines()
    f.close()
    # {REGFLAG_DELAY, 10, {}},
    # {0xE0, 1, {0x00}},

    delay=0
    for line in lines:
        if line.find('{REGFLAG_DELAY')==0:
            ds=line.split(',')
            # print('=========%s'%ds[1])
            # print(ds)
            # print(ds[1])
            delay=int(ds[1])
            # print(delay)
        elif line.find("{0x")==0:
            ds=line.split(',')
            reg=ds[0].split('0x')[1]

            dat=ds[2].split('{0x')[1].split('}')[0]
            # print("reg:%s delay:%2.2x data:%s"%(reg,dly,dat))
            print("15 %2.2X 02 %s %s"%(delay,reg,dat))
            delay=0



gen(r'mipi_init_sque.txt')
##3、修改设备树
&dsi0 {
	status = "okay";
	//rockchip,lane-rate = <1000>;
	dsi0_panel: panel@0 {
		status = "okay";
		compatible = "simple-panel-dsi";
		reg = <0>;
		power-supply = <&vcc3v3_lcd0_n>;
		//reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
		backlight = <&backlight>;
		reset-delay-ms = <60>;
		enable-delay-ms = <60>;
		prepare-delay-ms = <60>;
		unprepare-delay-ms = <60>;
		disable-delay-ms = <60>;
		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
			MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
		dsi,format = <MIPI_DSI_FMT_RGB888>;
		dsi,lanes  = <4>;
		panel-init-sequence = [
				15 0A 02 E0 00
				15 00 02 E1 93
				15 00 02 E2 65
				15 00 02 E3 F8
				15 00 02 80 03
				15 00 02 E0 01
				15 00 02 00 00
				15 00 02 01 38
				15 00 02 0C 74
				15 00 02 17 00
				15 00 02 18 AF
				15 00 02 19 00
				15 00 02 1A 00
				15 00 02 1B AF
				15 00 02 1C 00
				15 00 02 35 26
				15 00 02 37 09
				15 00 02 38 04
				15 00 02 39 00
				15 00 02 3A 01
				15 00 02 3C 78
				15 00 02 3D FF
				15 00 02 3E FF
				15 00 02 3F 7F
				15 00 02 40 06
				15 00 02 41 A0
				15 00 02 42 81
				15 00 02 43 14
				15 00 02 44 23
				15 00 02 45 28
				15 00 02 55 02
				15 00 02 57 69
				15 00 02 59 0A
				15 00 02 5A 2A
				15 00 02 5B 17
				15 00 02 5D 7F
				15 00 02 5E 6A
				15 00 02 5F 5B
				15 00 02 60 4F
				15 00 02 61 4A
				15 00 02 62 3D
				15 00 02 63 41
				15 00 02 64 2A
				15 00 02 65 44
				15 00 02 66 43
				15 00 02 67 44
				15 00 02 68 62
				15 00 02 69 52
				15 00 02 6A 59
				15 00 02 6B 4C
				15 00 02 6C 48
				15 00 02 6D 3A
				15 00 02 6E 26
				15 00 02 6F 00
				15 00 02 70 7F
				15 00 02 71 6A
				15 00 02 72 5B
				15 00 02 73 4F
				15 00 02 74 4A
				15 00 02 75 3D
				15 00 02 76 41
				15 00 02 77 2A
				15 00 02 78 44
				15 00 02 79 43
				15 00 02 7A 44
				15 00 02 7B 62
				15 00 02 7C 52
				15 00 02 7D 59
				15 00 02 7E 4C
				15 00 02 7F 48
				15 00 02 80 3A
				15 00 02 81 26
				15 00 02 82 00
				15 00 02 E0 02
				15 00 02 00 42
				15 00 02 01 42
				15 00 02 02 40
				15 00 02 03 40
				15 00 02 04 5E
				15 00 02 05 5E
				15 00 02 06 5F
				15 00 02 07 5F
				15 00 02 08 5F
				15 00 02 09 57
				15 00 02 0A 57
				15 00 02 0B 77
				15 00 02 0C 77
				15 00 02 0D 47
				15 00 02 0E 47
				15 00 02 0F 45
				15 00 02 10 45
				15 00 02 11 4B
				15 00 02 12 4B
				15 00 02 13 49
				15 00 02 14 49
				15 00 02 15 5F
				15 00 02 16 41
				15 00 02 17 41
				15 00 02 18 40
				15 00 02 19 40
				15 00 02 1A 5E
				15 00 02 1B 5E
				15 00 02 1C 5F
				15 00 02 1D 5F
				15 00 02 1E 5F
				15 00 02 1F 57
				15 00 02 20 57
				15 00 02 21 77
				15 00 02 22 77
				15 00 02 23 46
				15 00 02 24 46
				15 00 02 25 44
				15 00 02 26 44
				15 00 02 27 4A
				15 00 02 28 4A
				15 00 02 29 48
				15 00 02 2A 48
				15 00 02 2B 5F
				15 00 02 2C 01
				15 00 02 2D 01
				15 00 02 2E 00
				15 00 02 2F 00
				15 00 02 30 1F
				15 00 02 31 1F
				15 00 02 32 1E
				15 00 02 33 1E
				15 00 02 34 1F
				15 00 02 35 17
				15 00 02 36 17
				15 00 02 37 37
				15 00 02 38 37
				15 00 02 39 08
				15 00 02 3A 08
				15 00 02 3B 0A
				15 00 02 3C 0A
				15 00 02 3D 04
				15 00 02 3E 04
				15 00 02 3F 06
				15 00 02 40 06
				15 00 02 41 1F
				15 00 02 42 02
				15 00 02 43 02
				15 00 02 44 00
				15 00 02 45 00
				15 00 02 46 1F
				15 00 02 47 1F
				15 00 02 48 1E
				15 00 02 49 1E
				15 00 02 4A 1F
				15 00 02 4B 17
				15 00 02 4C 17
				15 00 02 4D 37
				15 00 02 4E 37
				15 00 02 4F 09
				15 00 02 50 09
				15 00 02 51 0B
				15 00 02 52 0B
				15 00 02 53 05
				15 00 02 54 05
				15 00 02 55 07
				15 00 02 56 07
				15 00 02 57 1F
				15 00 02 58 40
				15 00 02 5B 30
				15 00 02 5C 16
				15 00 02 5D 34
				15 00 02 5E 05
				15 00 02 5F 02
				15 00 02 63 00
				15 00 02 64 6A
				15 00 02 67 73
				15 00 02 68 1D
				15 00 02 69 08
				15 00 02 6A 6A
				15 00 02 6B 08
				15 00 02 6C 00
				15 00 02 6D 00
				15 00 02 6E 00
				15 00 02 6F 88
				15 00 02 75 FF
				15 00 02 77 DD
				15 00 02 78 3F
				15 00 02 79 15
				15 00 02 7A 17
				15 00 02 7D 14
				15 00 02 7E 82
				15 00 02 E0 04
				15 00 02 00 0E
				15 00 02 02 B3
				15 00 02 09 61
				15 00 02 0E 48
				15 00 02 E0 00
				15 00 02 E6 02
				15 00 02 E7 0C
				15 00 02 11 00
				15 78 02 E0 00
				15 00 02 29 00
				15 05 02 35 00
		];
			
		disp_timings0: display-timings {
			native-mode = <&dsi0_timing0>;
			dsi0_timing0: timing0 {
				clock-frequency = <71000000>;
				hactive = <800>;
				vactive = <1280>;
				hfront-porch = <48>;
				hsync-len = <8>;
				hback-porch = <42>;
				vfront-porch = <15>;
				vsync-len = <6>;
				vback-porch = <16>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <1>;
				pixelclk-active = <0>;
				swap-rb=<0>;
				swap-rg=<1>;
				swap-gb=<1>;
			};
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				panel_in_dsi: endpoint {
					remote-endpoint = <&dsi_out_panel>;
				};
			};
		};
	};

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@1 {
			reg = <1>;
			dsi_out_panel: endpoint {
				remote-endpoint = <&panel_in_dsi>;
			};
		};
	};

};

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