嵌入式学习：裸机开发_L4_官方SDK开发LED实验

1. 硬件层电路

1.1 正点原子 i.MX6ULL ALPHA V2.2 开发板

查看底板原理图可知：

功能管脚	芯片引脚
LED0	GPIO1_IO03

1.2 飞凌i.MX6UL-C开发板

2. 软件编写

2.1. 正点原子 i.MX6ULL ALPHA V2.2 开发板

2.1.1 imx6ull.lds

链接脚本文件，固定烧写位置0x87800000

SECTIONS {
   
    . = 0x87800000;
    .text : {
   
        start.o
        *(.text)
    }

    .rodata ALIGN(4) : {
    *(.rodata) }
    .data ALIGN(4) : {
    *(.data) }
    __bss_start = .;
    .bss ALIGN(4) : {
    *(.bss) *(COMMON) }
    __bss_end = .;
}

符号	含义
.text	代码段
.rodata	常量数据段
.data	已初始化的数据段
.bss	未初始化的数据段

2.1.2 start.S

启动文件：注意：要初始化bss段

.global _start

.global _bss_start
_bss_start:
    .word __bss_start

.global _bss_end
_bss_end:
    .word __bss_end

_start:
    /**
    设置处理器进入SVC模式
     */
    mrs r0, cpsr        /* 读取cpsr寄存器 */
    bic r0, r0, #0x1f   /* 清除低5位 */
    orr r0, r0, #0x13   /* 使用SVC模式 */
    msr cpsr, r0        /* 将配置信息写入cpsr寄存器 */

    /**
    清除BSS段
     */
    ldr r0, _bss_start
    ldr r1, _bss_end
    mov r2, #0
bss_loop:/* for(int i=_bss_start; i < _bss_end; i++ ) 实现 */
    stmia r0!, {
   r2}     /* r2 值写入 r0 指向的地址处， 然后r0++ */
    cmp r0, r1          /* 比较 r0 和 r1 的值*/
    ble bss_loop        /* 小于就跳转到bss_loop */

    /**
    设置sp指针，2MB大小空间
     */
    ldr sp, =0x80200000 /* 设置堆栈起始地址，注意i.MX6ULL堆栈向下增长 */

    /**
    跳转到main函数
     */
    b main

2.1.3. cc.h

/**
 *  说明：NXP_SDK 常用数据类型定义
 * 
 */

#ifndef __CC_H
#define __CC_H

#define __I                 volatile
#define __O                 volatile
#define __IO                volatile

typedef signed char         int8_t;
typedef signed short        int16_t;
typedef signed int          int32_t;
typedef unsigned char       uint8_t;
typedef unsigned short      uint16_t;
typedef unsigned int        uint32_t;
typedef unsigned long long  uint64_t;

typedef signed char         s8;
typedef signed short        s16;
typedef signed int          s32;
typedef signed long long    s64;
typedef unsigned char       u8;
typedef unsigned short      u16;
typedef unsigned int        u32;
typedef unsigned long long  u64;

#endif

2.1.4. fsl_common.h

2.1.4.1 用cc.h替换掉原来头文件

2.1.4.2 删掉下面代码

修改完成后的fsl_commmon.h：

/*

 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.

 * Copyright 2016-2017 NXP

 *

 * Redistribution and use in source and binary forms, with or without modification,

 * are permitted provided that the following conditions are met:

 *

 * o Redistributions of source code must retain the above copyright notice, this list

 *   of conditions and the following disclaimer.

 *

 * o Redistributions in binary form must reproduce the above copyright notice, this

 *   list of conditions and the following disclaimer in the documentation and/or

 *   other materials provided with the distribution.

 *

 * o Neither the name of the copyright holder nor the names of its

 *   contributors may be used to endorse or promote products derived from this

 *   software without specific prior written permission.

 *

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND

 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR

 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON

 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */



#ifndef _FSL_COMMON_H_

#define _FSL_COMMON_H_



#include "cc.h"



/*!

 * @addtogroup ksdk_common

 * @{

 */



/*******************************************************************************

 * Definitions

 ******************************************************************************/



/*! @brief Construct a status code value from a group and code number. */

#define MAKE_STATUS(group, code) ((((group)*100) + (code)))



/*! @brief Construct the version number for drivers. */

#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix))



/* Debug console type definition. */

#define DEBUG_CONSOLE_DEVICE_TYPE_NONE 0U     /*!< No debug console.             */

#define DEBUG_CONSOLE_DEVICE_TYPE_UART 1U     /*!< Debug console base on UART.   */

#define DEBUG_CONSOLE_DEVICE_TYPE_LPUART 2U   /*!< Debug console base on LPUART. */

#define DEBUG_CONSOLE_DEVICE_TYPE_LPSCI 3U    /*!< Debug console base on LPSCI.  */

#define DEBUG_CONSOLE_DEVICE_TYPE_USBCDC 4U   /*!< Debug console base on USBCDC. */

#define DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM 5U /*!< Debug console base on USBCDC. */

#define DEBUG_CONSOLE_DEVICE_TYPE_IUART 6U    /*!< Debug console base on i.MX UART. */

#define DEBUG_CONSOLE_DEVICE_TYPE_VUSART 7U   /*!< Debug console base on LPC_USART. */



/*! @brief Status group numbers. */

enum _status_groups

{
   

    kStatusGroup_Generic = 0,                 /*!< Group number for generic status codes. */

    kStatusGroup_FLASH = 1,                   /*!< Group number for FLASH status codes. */

    kStatusGroup_LPSPI = 4,                   /*!< Group number for LPSPI status codes. */

    kStatusGroup_FLEXIO_SPI = 5,              /*!< Group number for FLEXIO SPI status codes. */

    kStatusGroup_DSPI = 6,                    /*!< Group number for DSPI status codes. */

    kStatusGroup_FLEXIO_UART = 7,             /*!< Group number for FLEXIO UART status codes. */

    kStatusGroup_FLEXIO_I2C = 8,              /*!< Group number for FLEXIO I2C status codes. */

    kStatusGroup_LPI2C = 9,                   /*!< Group number for LPI2C status codes. */

    kStatusGroup_UART = 10,                   /*!< Group number for UART status codes. */

    kStatusGroup_I2C = 11,                    /*!< Group number for UART status codes. */

    kStatusGroup_LPSCI = 12,                  /*!< Group number for LPSCI status codes. */

    kStatusGroup_LPUART = 13,                 /*!< Group number for LPUART status codes. */

    kStatusGroup_SPI = 14,                    /*!< Group number for SPI status code.*/

    kStatusGroup_XRDC = 15,                   /*!< Group number for XRDC status code.*/

    kStatusGroup_SEMA42 = 16,                 /*!< Group number for SEMA42 status code.*/

    kStatusGroup_SDHC = 17,                   /*!< Group number for SDHC status code */

    kStatusGroup_SDMMC = 18,                  /*!< Group number for SDMMC status code */

    kStatusGroup_SAI = 19,                    /*!< Group number for SAI status code */

    kStatusGroup_MCG = 20,                    /*!< Group number for MCG status codes. */

    kStatusGroup_SCG = 21,                    /*!< Group number for SCG status codes. */

    kStatusGroup_SDSPI = 22,                  /*!< Group number for SDSPI status codes. */

    kStatusGroup_FLEXIO_I2S = 23,             /*!< Group number for FLEXIO I2S status codes */

    kStatusGroup_FLEXIO_MCULCD = 24,          /*!< Group number for FLEXIO LCD status codes */

    kStatusGroup_FLASHIAP = 25,               /*!< Group number for FLASHIAP status codes */

    kStatusGroup_FLEXCOMM_I2C = 26,           /*!< Group number for FLEXCOMM I2C status codes */

    kStatusGroup_I2S = 27,                    /*!< Group number for I2S status codes */

    kStatusGroup_IUART = 28,                  /*!< Group number for IUART status codes */

    kStatusGroup_CSI = 29,                    /*!< Group number for CSI status codes */

    kStatusGroup_SDRAMC = 35,                 /*!< Group number for SDRAMC status codes. */

    kStatusGroup_POWER = 39,                  /*!< Group number for POWER status codes. */

    kStatusGroup_ENET = 40,                   /*!< Group number for ENET status codes. */

    kStatusGroup_PHY = 41,                    /*!< Group number for PHY status codes. */

    kStatusGroup_TRGMUX = 42,                 /*!< Group number for TRGMUX status codes. */

    kStatusGroup_SMARTCARD = 43,              /*!< Group number for SMARTCARD status codes. */

    kStatusGroup_LMEM = 44,                   /*!< Group number for LMEM status codes. */

    kStatusGroup_QSPI = 45,                   /*!< Group number for QSPI status codes. */

    kStatusGroup_DMA = 50,                    /*!< Group number for DMA status codes. */

    kStatusGroup_EDMA = 51,                   /*!< Group number for EDMA status codes. */

    kStatusGroup_DMAMGR = 52,                 /*!< Group number for DMAMGR status codes. */

    kStatusGroup_FLEXCAN = 53,                /*!< Group number for FlexCAN status codes. */

    kStatusGroup_LTC = 54,                    /*!< Group number for LTC status codes. */

    kStatusGroup_FLEXIO_CAMERA = 55,          /*!< Group number for FLEXIO CAMERA status codes. */

    kStatusGroup_LPC_SPI = 56,                /*!< Group number for LPC_SPI status codes. */

    kStatusGroup_LPC_USART = 57,              /*!< Group number for LPC_USART status codes. */

    kStatusGroup_DMIC = 58,                   /*!< Group number for DMIC status codes. */

    kStatusGroup_SDIF = 59,                   /*!< Group number for SDIF status codes.*/

    kStatusGroup_SPIFI = 60,                  /*!< Group number for SPIFI status codes. */

    kStatusGroup_OTP = 61,                    /*!< Group number for OTP status codes. */

    kStatusGroup_MCAN = 62,                   /*!< Group number for MCAN status codes. */

    kStatusGroup_CAAM = 63,                   /*!< Group number for CAAM status codes. */

    kStatusGroup_ECSPI = 64,                  /*!< Group number for ECSPI status codes. */

    kStatusGroup_USDHC = 65,                  /*!< Group number for USDHC status codes.*/

    kStatusGroup_LPC_I2C = 66,                /*!< Group number for LPC_I2C status codes.*/

    kStatusGroup_ESAI = 69,                   /*!< Group number for ESAI status codes. */

    kStatusGroup_FLEXSPI = 70,                /*!< Group number for FLEXSPI status codes. */

    kStatusGroup_MMDC = 71,                   /*!< Group number for MMDC status codes. */

    kStatusGroup_MICFIL = 72,                 /*!< Group number for MIC status codes. */

    kStatusGroup_SDMA = 73,                   /*!< Group number for SDMA status codes. */

    kStatusGroup_NOTIFIER = 98,               /*!< Group number for NOTIFIER status codes. */

    kStatusGroup_DebugConsole = 99,           /*!< Group number for debug console status codes. */

    kStatusGroup_ApplicationRangeStart = 100, /*!< Starting number for application groups. */

};



/*! @brief Generic status return codes. */

enum _generic_status

{
   

    kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0),

    kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1),

    kStatus_ReadOnly = MAKE_STATUS(kStatusGroup_Generic, 2),

    kStatus_OutOfRange = MAKE_STATUS(kStatusGroup_Generic, 3),

    kStatus_InvalidArgument = MAKE_STATUS(kStatusGroup_Generic, 4),

    kStatus_Timeout = MAKE_STATUS(kStatusGroup_Generic, 5),

    kStatus_NoTransferInProgress = MAKE_STATUS(kStatusGroup_Generic, 6),

};


/*! @brief Type used for all status and error return values. */

typedef int32_t status_t;

#endif /* _FSL_COMMON_H_ */

2.1.5. fsl_iomuxc.h

这个文件中定义了大量IOMUX相关寄存器，提供两个便于配置管脚复用功能和电气属性的函数IOMUXC_SetPinMux() 和 IOMUXC_SetPinConfig()。

2.1.5.1 修改：添加头文件"MCIMX6Y2.h"

2.1.5.2 删除__cplusplus宏（1）

IOMUXC_SetPinMux() 函数用于设置管脚复用功能。

IOMUXC_SetPinConfig() 用于设置管脚电气属性

2.1.5.3 删除__cplusplus宏（2）

修改完成后的fsl_iomux.h

/*

 * Copyright (c) 2016, Freescale Semiconductor, Inc.

 * All rights reserved.

 *

 * Redistribution and use in source and binary forms, with or without modification,

 * are permitted provided that the following conditions are met:

 *

 * o Redistributions of source code must retain the above copyright notice, this list

 *   of conditions and the following disclaimer.

 *

 * o Redistributions in binary form must reproduce the above copyright notice, this

 *   list of conditions and the following disclaimer in the documentation and/or

 *   other materials provided with the distribution.

 *

 * o Neither the name of copyright holder nor the names of its

 *   contributors may be used to endorse or promote products derived from this

 *   software without specific prior written permission.

 *

 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND

 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR

 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON

 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

 */



#ifndef _FSL_IOMUXC_H_

#define _FSL_IOMUXC_H_



#include "MCIMX6Y2.h"

#include "fsl_common.h"



/*!

 * @addtogroup iomuxc_driver

 * @{

 */



/*! @file */



/*******************************************************************************

 * Definitions

 ******************************************************************************/



/*! @name Driver version */

/*@{*/

/*! @brief IOMUXC driver version 2.0.0. */

#define FSL_IOMUXC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

/*@}*/



/*! @name Pin function ID */

/*@{*/

/*! @brief The pin function ID is a tuple of  */

#define IOMUXC_SNVS_BOOT_MODE0_GPIO5_IO10                    0x02290000U, 0x5U, 0x00000000U, 0x0U, 0x02290044U

#define IOMUXC_SNVS_BOOT_MODE1_GPIO5_IO11                    0x02290004U, 0x5U, 0x00000000U, 0x0U, 0x02290048U

#define IOMUXC_SNVS_SNVS_TAMPER0_GPIO5_IO00                  0x02290008U, 0x5U, 0x00000000U, 0x0U, 0x0229004CU

#define IOMUXC_SNVS_SNVS_TAMPER1_GPIO5_IO01                  0x0229000CU, 0x5U, 0x00000000U, 0x0U, 0x02290050U

#define IOMUXC_SNVS_SNVS_TAMPER2_GPIO5_IO02                  0x02290010U, 0x5U, 0x00000000U, 0x0U, 0x02290054U

#define IOMUXC_SNVS_SNVS_TAMPER3_GPIO5_IO03                  0x02290014U, 0x5U, 0x00000000U, 0x0U, 0x02290058U

#define IOMUXC_SNVS_SNVS_TAMPER4_GPIO5_IO04                  0x02290018U, 0x5U, 0x00000000U, 0x0U, 0x0229005CU

#define IOMUXC_SNVS_SNVS_TAMPER5_GPIO5_IO05                  0x0229001CU, 0x5U, 0x00000000U, 0x0U, 0x02290060U

#define IOMUXC_SNVS_SNVS_TAMPER6_GPIO5_IO06                  0x02290020U, 0x5U, 0x00000000U, 0x0U, 0x02290064U

#define IOMUXC_SNVS_SNVS_TAMPER7_GPIO5_IO07                  0x02290024U, 0x5U, 0x00000000U, 0x0U, 0x02290068U

#define IOMUXC_SNVS_SNVS_TAMPER8_GPIO5_IO08                  0x02290028U, 0x5U, 0x00000000U, 0x0U, 0x0229006CU

#define IOMUXC_SNVS_SNVS_TAMPER9_GPIO5_IO09                  0x0229002CU, 0x5U, 0x00000000U, 0x0U, 0x02290070U

#define IOMUXC_SNVS_TEST_MODE                                0x00000000U, 0x0U, 0x00000000U, 0x0U, 0x02290030U

#define IOMUXC_SNVS_POR_B                                    0x00000000U, 0x0U, 0x00000000U, 0x0U, 0x02290034U

#define IOMUXC_SNVS_ONOFF                                    0x00000000U, 0x0U, 0x00000000U, 0x0U, 0x02290038U

#define IOMUXC_SNVS_SNVS_PMIC_ON_REQ                         0x00000000U, 0x0U, 0x00000000U, 0x0U, 0x0229003CU

#define IOMUXC_SNVS_CCM_PMIC_STBY_REQ                        0x00000000U, 0x0U, 0x00000000U, 0x0U, 0x02290040U

#define IOMUXC_JTAG_MOD_SJC_MOD                              0x020E0044U, 0x0U, 0x00000000U, 0x0U, 0x020E02D0U

#define IOMUXC_JTAG_MOD_GPT2_CLK                             0x020E0044U, 0x1U, 0x020E05A0U, 0x0U, 0x020E02D0U

#define IOMUXC_JTAG_MOD_SPDIF_OUT                            0x020E0044U, 0x2U, 0x00000000U, 0x0U, 0x020E02D0U

#define IOMUXC_JTAG_MOD_ENET1_REF_CLK_25M                    0x020E0044U, 0x3U, 0x00000000U, 0x0U, 0x020E02D0U

#define IOMUXC_JTAG_MOD_CCM_PMIC_RDY                         0x020E0044U, 0x4U, 0x020E04C0U, 0x0U, 0x020E02D0U

#define IOMUXC_JTAG_MOD_GPIO1_IO10                           0x020E0044U, 0x5U, 0x00000000U, 0x0U, 0x020E02D0U

#define IOMUXC_JTAG_MOD_SDMA_EXT_EVENT00                     0x020E0044U, 0x6U, 0x020E0610U, 0x0U, 0x020E02D0U

#define IOMUXC_JTAG_TMS_SJC_TMS                              0x020E0048U, 0x0U, 0x00000000U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TMS_GPT2_CAPTURE1                        0x020E0048U, 0x1U, 0x020E0598U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TMS_SAI2_MCLK                            0x020E0048U, 0x2U, 0x020E05F0U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TMS_CCM_CLKO1                            0x020E0048U, 0x3U, 0x00000000U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TMS_CCM_WAIT                             0x020E0048U, 0x4U, 0x00000000U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TMS_GPIO1_IO11                           0x020E0048U, 0x5U, 0x00000000U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TMS_SDMA_EXT_EVENT01                     0x020E0048U, 0x6U, 0x020E0614U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TMS_EPIT1_OUT                            0x020E0048U, 0x8U, 0x00000000U, 0x0U, 0x020E02D4U

#define IOMUXC_JTAG_TDO_SJC_TDO                              0x020E004CU, 0x0U, 0x00000000U, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDO_GPT2_CAPTURE2                        0x020E004CU, 0x1U, 0x020E059CU, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDO_SAI2_TX_SYNC                         0x020E004CU, 0x2U, 0x020E05FCU, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDO_CCM_CLKO2                            0x020E004CU, 0x3U, 0x00000000U, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDO_CCM_STOP                             0x020E004CU, 0x4U, 0x00000000U, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDO_GPIO1_IO12                           0x020E004CU, 0x5U, 0x00000000U, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDO_MQS_RIGHT                            0x020E004CU, 0x6U, 0x00000000U, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDO_EPIT2_OUT                            0x020E004CU, 0x8U, 0x00000000U, 0x0U, 0x020E02D8U

#define IOMUXC_JTAG_TDI_SJC_TDI                              0x020E0050U, 0x0U, 0x00000000U, 0x0U, 0x020E02DCU

#define IOMUXC_JTAG_TDI_GPT2_COMPARE1                        0x020E0050U, 0x1U, 0x00000000U, 0x0U, 0x020E02DCU

#define IOMUXC_JTAG_TDI_SAI2_TX_BCLK                         0x020E0050U, 0x2U, 0x020E05F8U, 0x0U, 0x020E02DCU

#define IOMUXC_JTAG_TDI_PWM6_OUT                             0x020E0050U, 0x4U, 0x00000000U, 0x0U, 0x020E02DCU

#define IOMUXC_JTAG_TDI_GPIO1_IO13                           0x020E0050U, 0x5U, 0x00000000U, 0x0U, 0x020E02DCU

#define IOMUXC_JTAG_TDI_MQS_LEFT                             0x020E0050U, 0x6U, 0x00000000U, 0x0U, 0x020E02DCU

#define IOMUXC_JTAG_TCK_SJC_TCK                              0x020E0054U, 0x0U, 0x00000000U, 0x0U, 0x020E02E0U

#define IOMUXC_JTAG_TCK_GPT2_COMPARE2                        0x020E0054U, 0x1U, 0x00000000U, 0x0U, 0x020E02E0U

#define IOMUXC_JTAG_TCK_SAI2_RX_DATA                         0x020E0054U, 0x2U, 0x020E05F4U, 0x0U, 0x020E02E0U

#define IOMUXC_JTAG_TCK_PWM7_OUT                             0x020E0054U, 0x4U, 0x00000000U, 0x0U, 0x020E02E0U

#define IOMUXC_JTAG_TCK_GPIO1_IO14                           0x020E0054U, 0x5U, 0x00000000U, 0x0U, 0x020E02E0U

#define IOMUXC_JTAG_TRST_B_SJC_TRSTB                         0x020E0058U, 0x0U, 0x00000000U, 0x0U, 0x020E02E4U

#define IOMUXC_JTAG_TRST_B_GPT2_COMPARE3                     0x020E0058U, 0x1U, 0x00000000U, 0x0U, 0x020E02E4U

#define IOMUXC_JTAG_TRST_B_SAI2_TX_DATA                      0x020E0058U, 0x2U, 0x00000000U, 0x0U, 0x020E02E4U

#define IOMUXC_JTAG_TRST_B_PWM8_OUT                          0x020E0058U, 0x4U, 0x00000000U, 0x0U, 0x020E02E4U

#define IOMUXC_JTAG_TRST_B_GPIO1_IO15                        0x020E0058U, 0x5U, 0x00000000U, 0x0U, 0x020E02E4U

#define IOMUXC_GPIO1_IO00_I2C2_SCL                           0x020E005CU, 0x0U, 0x020E05ACU, 0x1U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_GPT1_CAPTURE1                      0x020E005CU, 0x1U, 0x020E058CU, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_ANATOP_OTG1_ID                     0x020E005CU, 0x2U, 0x020E04B8U, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_ENET1_REF_CLK1                     0x020E005CU, 0x3U, 0x020E0574U, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_MQS_RIGHT                          0x020E005CU, 0x4U, 0x00000000U, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_GPIO1_IO00                         0x020E005CU, 0x5U, 0x00000000U, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_ENET1_1588_EVENT0_IN               0x020E005CU, 0x6U, 0x00000000U, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_SRC_SYSTEM_RESET                   0x020E005CU, 0x7U, 0x00000000U, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO00_WDOG3_WDOG_B                       0x020E005CU, 0x8U, 0x00000000U, 0x0U, 0x020E02E8U

#define IOMUXC_GPIO1_IO01_I2C2_SDA                           0x020E0060U, 0x0U, 0x020E05B0U, 0x1U, 0x020E02ECU

#define IOMUXC_GPIO1_IO01_GPT1_COMPARE1                      0x020E0060U, 0x1U, 0x00000000U, 0x0U, 0x020E02ECU

#define IOMUXC_GPIO1_IO01_USB_OTG1_OC                        0x020E0060U, 0x2U, 0x020E0664U, 0x0U, 0x020E02ECU

#define IOMUXC_GPIO1_IO01_ENET2_REF_CLK2                     0x020E0060U, 0x3U, 0x020E057CU, 0x0U, 0x020E02ECU

#define IOMUXC_GPIO1_IO01_MQS_LEFT                           0x020E0060U, 0x4U, 0x00000000U, 0x0U, 0x020E02ECU

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