Zynq中断与AMP~双核串口环回之PS与PL通信

实现思路:

额外配置:通过PL配置计数器,向CPU0和CPU1发送硬中断。

        1.串口中断CPU0,在中断中设置接收设置好字长的数据,如果这些数据的数值符合约定的命令,则关闭硬中断,并将这部分数据存入AxiLite配置的ram中,完成以后发送软中断中断CPU1。

        2.CPU1收到软中断后,读取指定的ram数值,校验以后将其写入ram2中,如果这里不做换回可以写入其他的。写完以后发送中断给CPU0。

        3.CPU0接收到中断,读取ram2的数据,并且完成发送。

Zynq中断与AMP~双核串口环回之PS与PL通信_第1张图片

部分代码:

其中读写Bram的代码可参考:

Axi_Lite接口的IP核与地址与缓冲与AxiGP0-CSDN博客

CPU0中配置的Uart中断回调函数

        设置的是超时中断触发,set阈值那个不太好用。

void Uart0_IntrHandler(void *CallBackRef, u32 Event, unsigned int EventData)
{
	if (Event == XUARTPS_EVENT_RECV_TOUT) {
		TotalReceivedCount = EventData;
        if (TotalReceivedCount == 8 
        && RecvBuffer[0] == 0x55 && RecvBuffer[1] == 0x55
        && RecvBuffer[2] == 0x00 && RecvBuffer[3] == 0x01)
        {
            XScuGic_Disable(&GIC_SGI_instance_point, Interrupt_ID_Hardware_1);
            XScuGic_Disable(&GIC_SGI_instance_point, Interrupt_ID_Hardware_0);
            Axi_WriteRamA(RecvBuffer,TotalReceivedCount);
            printf("Close SPI\n\r");
            XScuGic_SoftwareIntr(&GIC_SGI_instance_point,
                                  Interrupt_ID_SGI_15,
                                  XSCUGIC_SPI_CPU1_MASK);
        }
        else if(TotalReceivedCount == 8 && RecvBuffer[0] == 0x66)
        {
            XScuGic_Enable(&GIC_SGI_instance_point, Interrupt_ID_Hardware_0);
            printf("Open SPI\n\r");
        }
	}
	XUartPs_Recv(&Uart_Instance_point, RecvBuffer, TEST_BUFFER_SIZE);
}

CPU1的软中断回调函数


void SGI_IntrHandler(void *CallBackRef){
    u32 origin_command;
	print("SG1!\n\r");
	Axi_ReadRamA(COMMAND_BUFFER,8);
    if(COMMAND_BUFFER[4]==0x04 && COMMAND_BUFFER[5] == 0x05 
    && COMMAND_BUFFER[6]==0x06 && COMMAND_BUFFER[7] == 0x07)
        {
            Axi_WriteRamB(COMMAND_BUFFER,8);
            XScuGic_SoftwareIntr(&GIC_SGI_instance_point, Interrupt_ID_SGI_14, CPU_id_0);
        }
}  

CPU0的软中断回调函数

void SGI_IntrHandler(void *CallBackRef){
      Axi_ReadRamB(SendBuffer,8);
      XUartPs_Send(&Uart_Instance_point, SendBuffer, 8);
	  print("SG0!\n\r");
}

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