Vivado :ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode

Vivado :ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode_第1张图片
 

 经过测试,将文件中包含的头文件的位置从模块名上方移到下方即可

`include "parameter.vh"
module top(clk,rst, bus_data);

endmodule

 改为


module top(clk,rst, bus_data);

`include "parameter.vh"


endmodule

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