RK3568-clock

pll锁相环

RK3568-clock_第1张图片

总线

RK3568-clock_第2张图片

gating

RK3568-clock_第3张图片

rk3568.dtsi

pmucru: clock-controller@fdd00000 {
	compatible = "rockchip,rk3568-pmucru";
	reg = <0x0 0xfdd00000 0x0 0x1000>;
	rockchip,grf = <&grf>;
	rockchip,pmugrf = <&pmugrf>;
	#clock-cells = <1>;
	#reset-cells = <1>;

	assigned-clocks = <&pmucru SCLK_32K_IOE>;
	assigned-clock-parents = <&pmucru CLK_RTC_32K>;
};

cru: clock-controller@fdd20000 {
	compatible = "rockchip,rk3568-cru";
	re

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