Quartus与modelsim联合仿真报错--Fatal error in Process MEMORY

ROM初始化存储文件路径问题

工程联合仿真时出现下列错误。

# ** Error: (vsim-7) Failed to open VHDL file "./VHDL/ROM_WAVE/hann_sin60k.mif" in rb mode.
# 
# No such file or directory. (errno = ENOENT)
#    Time: 0 ps  Iteration: 0  Instance: /siggen_vhd_tst/i1/R1/altsyncram_component
# ** Fatal: (vsim-7) Failed to open VHDL file "./VHDL/ROM_WAVE/hann_sin60k.mif" in rb mode.
# 
# No such file or directory. (errno = ENOENT)
#    Time: 0 ps  Iteration: 0  Process: /siggen_vhd_tst/i1/R1/altsyncram_component/MEMORY File: D:/altera/13.0/modelsim_ase/win32aloem/../altera/vhdl/src/altera_mf/altera_mf.vhd
# Fatal error in Process MEMORY at D:/altera/13.0/modelsim_ase/win32aloem/../altera/vhdl/src/altera_mf/altera_mf.vhd line 40237

出现原因是如图所示，ROM存储数据初始化文件路径用的是相对路径，换成绝对路径就没问题了。