all: start.o arm-linux-ld -Tgboot.lds -o gboot.elf $^ arm-linux-objcopy -O binary gboot.elf gboot.bin %.o : %.S arm-linux-gcc -g -c $^ %.o : %.c arm-linux-gcc -g -c $^ .PHONY: clean clean: rm *.o *.elf *.bin
2.然后编写链接器脚本diyboot.lds
OUTPUT_ARCH(arm)//arm内核 ENTRY(_start)//代码入口start SECTIONS { . = 0x50008000; . = ALIGN(4); .text : //代码段 { start.o (.text) //start.s是初始化代码 *(.text) } . = ALIGN(4); //数据段,4字节对齐 .data : { *(.data) } . = ALIGN(4); bss_start = .; //当前代码所在地址 .bss : { *(.bss) } bss_end = .; //当前代码结束地址 }
3. 开始编写我们自己的start.S
a. 添加向量表
查看三星官方的ARM Architecture Reference Manual.pdf文件,可以看到ARM11共有七种模式
设计代码如下:
.text .global _start _start: b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort ldr pc, _data_abort ldr pc, _not_used ldr pc, _irq ldr pc, _fiq _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq undefined_instruction: nop software_interrupt: nop prefetch_abort: nop data_abort: nop not_used: nop irq: nop fiq: nop reset: nop
b. 设置SVC模式
如手册上表所示
要把CSRP的后五位M[4:0]设置为10011
另外要屏蔽中断和快速中断,他们的屏蔽室I为和F位
要把I位和F位设置为1 因此CSRP的后8为设置为11010011即为0xD3
因此修改代码如下:
.text .global _start _start: b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort ldr pc, _data_abort ldr pc, _not_used ldr pc, _irq ldr pc, _fiq _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq undefined_instruction: nop software_interrupt: nop prefetch_abort: nop data_abort: nop not_used: nop irq: nop fiq: nop reset: bl set_svc set_svc: mrs r0, cpsr //把CPSR导入到r0寄存器 bic r0, r0, #0x1f //把CPSR的后五位清零 orr r0, r0, #0xd3//把CPSR的后八位设置为0XD3 msr cpsr, r0//把r0值导入到CPSR mov pc, lr//退出CPSR寄存器c.关闭看门狗
.text .global _start _start: b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort ldr pc, _data_abort ldr pc, _not_used ldr pc, _irq ldr pc, _fiq _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word fiq undefined_instruction: nop software_interrupt: nop prefetch_abort: nop data_abort: nop not_used: nop irq: nop fiq: nop reset: bl set_svc bl disable_watchdog set_svc: mrs r0, cpsr bic r0, r0, #0x1f orr r0, r0, #0xd3 msr cpsr, r0 mov pc, lr #define pWTCON 0x7e004000 //定义WTCON的地址 disable_watchdog: ldr r0, =pWTCON //把地址装入r0 mov r1, #0x0 //r1清零 str r1, [r0] //把r1的0装入ro装入的WTCON所在的地址 mov pc, lr //返回
d.关闭中断
中断使能寄存器如图所示:
很简单只要把VIC0INTENABLE和VIC1INTENABLE全部设置为0即可,修改代码如下:
.text .global _start _start: b reset ldr pc, _undifined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort ldr pc, _data_abort ldr pc, _not_used ldr pc, _irq ldr pc, _fiq _undifined_instruction: .word undifined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word reset undifined_instruction: nop software_interrupt: nop prefetch_abort: nop data_abort: nop not_used: nop irq: nop fiq: nop reset: bl set_svc bl disable_watchdog bl disable_interrupt set_svc: mrs r0, cpsr bic r0, r0,#0x1f orr r0, r0,#0xd3 msr cpsr, r0 mov pc, lr #define pWTCON 0x7e004000 disable_watchdog: ldr r0, =pWTCON mov r1, #0x0 str r1, [r0] mov pc, lr disable_interrupt: //把VIC0INTENABLE和VIC1INTENABLE全部设置为0 mvn r1,#0x0 ldr r0,=0x71200014 str r1,[r0] ldr r0,=0x71300014 str r1,[r0] mov pc, lre.关闭MMU
.text .global _start _start: b reset ldr pc, _undifined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort ldr pc, _data_abort ldr pc, _not_used ldr pc, _irq ldr pc, _fiq _undifined_instruction: .word undifined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort _data_abort: .word data_abort _not_used: .word not_used _irq: .word irq _fiq: .word reset undifined_instruction: nop software_interrupt: nop prefetch_abort: nop data_abort: nop not_used: nop irq: nop fiq: nop reset: bl set_svc bl disable_watchdog bl disable_interrupt bl disable_mmu set_svc: mrs r0, cpsr bic r0, r0,#0x1f orr r0, r0,#0xd3 msr cpsr, r0 mov pc, lr #define pWTCON 0x7e004000 disable_watchdog: ldr r0, =pWTCON mov r1, #0x0 str r1, [r0] mov pc, lr disable_interrupt: mvn r1,#0x0 ldr r0,=0x71200014 str r1,[r0] ldr r0,=0x71300014 str r1,[r0] mov pc, lr disable_mmu: mcr p15,0,r0,c7,c7,0 mrc p15,0,r0,c1,c0,0 bic r0, r0, #0x00000007 mcr p15,0,r0,c1,c0,0 mov pc, lr