LPC17XX PLL initializiion
网页编辑跟C文件格式不同，注释不对齐。
注意LPC_SC->CCLKCFG = CCLKCFG_Val;不能放到PLL0配置之后！
#define CLOCK_SETUP 1
#define SCS_Val 0x00000020
/* Set Main oscillator 12MHz as system clock */
#define CLKSRCSEL_Val 0x00000001
/* Selects the main oscillator for PLL0 */
/* 00 Selects the Internal RC oscillator as the PLL0 clock source */
/* 01 Selects the main oscillator as the PLL0 clock source */
/* 10 Selects the RTC oscillator as the PLL0 clock source */
/* 11 Reserved, do not use this setting */
#define PLL0_SETUP 1
#define PLL0CFG_Val 49|(2<<16)
/* 49+1=50 as M, 2+1=3 as N */
/* PLL0 FCCO = (2 × M × FIN) / N = 2x12x50/3 = 400MHz */
/* 14:0 MSEL0 PLL0 Multiplier value M-1 */
/* 23:16 NSEL0 PLL0 Pre-Divider value N-1 */
#define PLL1_SETUP 1
#define PLL1CFG_Val 0x00000023
/* 3+1=4 as M, 1+1=2 as N */
/* PLL1 FCCO = (2 × M × FIN) / N = 2x4x12/2 = 48 MHz */
/* 4:0 MSEL1 PLL1 Multiplier value */
/* 6:5 PSEL1 PLL1 Divider value */
#define CCLKCFG_Val 0x00000003
/* 3+1=4 as CPU Clock divider */
/* cclk = PLL0/4= 288/4 = 72MHz */
/* This value must be 0 or odd values */
/* 0 means equal to pll0, 1 is one half of pll0, 3 is one quarter */
#define USBCLKCFG_Val 0x00000000
/* not used, PLL1 as default USB clock */
#define PCLKSEL0_Val 0x00000000
/* 00 PCLK_peripheral = CCLK/4 */
/* 01 PCLK_peripheral = CCLK */
/* 10 PCLK_peripheral = CCLK/2 */
/* 11 PCLK_peripheral = CCLK/8 */
#define PCLKSEL1_Val 0x00000000
/* 00 PCLK_peripheral = CCLK/4 */
/* 01 PCLK_peripheral = CCLK */
/* 10 PCLK_peripheral = CCLK/2 */
/* 11 PCLK_peripheral = CCLK/8 */
#define PCONP_Val 0x042887DE
#define CLKOUTCFG_Val 0x00000000
void SystemInit (void)
{
#if (CLOCK_SETUP) /* Clock Setup */
LPC_SC->SCS = SCS_Val; /* Enable Main Oscillator */
if (SCS_Val & (1 << 5)) /* If Main Oscillator is enabled */
{
while ((LPC_SC->SCS & (1<<6)) == 0);/* Wait for Oscillator to be ready */
}
LPC_SC->CCLKCFG = CCLKCFG_Val; /* Setup CPU Clock Divider 'caution' */
#if (PLL0_SETUP)
LPC_SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */
LPC_SC->PLL0CFG = PLL0CFG_Val; /* Set PLL0 multiplier and divider */
LPC_SC->PLL0CON = 0x01; /* PLL0 Enable */
LPC_SC->PLL0FEED = 0xAA; /* Effect PLL0CON operation */
LPC_SC->PLL0FEED = 0x55; /* Effect PLL0CON operation */
while (!(LPC_SC->PLL0STAT & (1<<26))); /* Wait for PLOCK0 stable */
LPC_SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */
LPC_SC->PLL0FEED = 0xAA; /* Fffect PLL0CON operation */
LPC_SC->PLL0FEED = 0x55; /* Fffect PLL0CON operation */
#endif
#if (PLL1_SETUP)
LPC_SC->PLL1CFG = PLL1CFG_Val; /* Set PLL1 multiplier and divider */
LPC_SC->PLL1CON = 0x01; /* PLL1 Enable */
LPC_SC->PLL1FEED = 0xAA; /* Fffect PLL1CON operation */
LPC_SC->PLL1FEED = 0x55; /* Fffect PLL1CON operation */
while (!(LPC_SC->PLL1STAT & (1<<10))); /* Wait for PLOCK1 */
LPC_SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */
LPC_SC->PLL1FEED = 0xAA; /* Fffect PLL1CON operation */
LPC_SC->PLL1FEED = 0x55; /* Fffect PLL1CON operation */
#else
LPC_SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider, not used */
#endif
LPC_SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection 0 */
LPC_SC->PCLKSEL1 = PCLKSEL1_Val; /* Peripheral Clock Selection 0 */
LPC_SC->PCONP = PCONP_Val; /* Power Control for Peripherals */
LPC_SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */
#endif
/* Determine clock frequency according to clock register values */
if (((LPC_SC->PLL0STAT >> 24)&3)==3) { /* If PLL0 enabled and connected */
switch (LPC_SC->CLKSRCSEL & 0x03) {
case 0: /* Internal RC oscillator => PLL0 */
case 3: /* Reserved, default to Internal RC */
SystemFrequency = (IRC_OSC *
(((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
(((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)) /
((LPC_SC->CCLKCFG & 0xFF)+ 1));
break;
case 1: /* Main oscillator => PLL0 */
SystemFrequency = (OSC_CLK *
(((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
(((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)) /
((LPC_SC->CCLKCFG & 0xFF)+ 1));
break;
case 2: /* RTC oscillator => PLL0 */
SystemFrequency = (RTC_CLK *
(((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
(((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)) /
((LPC_SC->CCLKCFG & 0xFF)+ 1));
break;
}
}
else {
switch (LPC_SC->CLKSRCSEL & 0x03) {
case 0: /* Internal RC oscillator => PLL0 */
case 3: /* Reserved, default to Internal RC */
SystemFrequency = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
break;
case 1: /* Main oscillator => PLL0 */
SystemFrequency = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
break;
case 2: /* RTC oscillator => PLL0 */
SystemFrequency = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
break;
}
}
#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */
LPC_SC->FLASHCFG = FLASHCFG_Val;
#endif
}