EDMA3的传输配置步骤，翻译自sprugx8b 5.7Setting Up a Transfer

5.7     Setting Up a Transfer 
        The following list provides a quick guide for the typical steps involved in setting up a transfer. 
        1.  Initiating a DMA/QDMA channel 
            (a) Determine the type of channel (QDMA or DMA) to be used. 
            (b) Channel mapping 
                (i)  If using a QDMA channel, program the QCHMAP with the parameter set number to which the 
                     channel maps and the trigger word. 
                (ii) If using a DMA channel, program the DCHMAP with the parameter set number to which the 
                     channel maps. 
            (c) If the channel is being used in the context of a shadow region, ensure the DRAE/DRAEH for the 
                region is properly set up to allow read write accesses to bits in the event registers and interrupt 
                registers in the Shadow region memory map. The subsequent steps in this process should be done 
                using the respective shadow region registers. (Shadow region descriptions and usage are provided 
                in Section 5.2.7.1.) 
            (d) Determine the type of triggering used. 
                (i)  If external events are used for triggering (DMA channels), enable the respective event in 
                     EER/EERH by writing into EESR/EESRH. 
                (ii) If QDMA Channel is used, enable the channel in QEER by writing into QEESR. 
            (e) Queue setup 
                (i)  If a QDMA channel is used, set up the QDMAQNUM to map the channel to the respective 
                     event queue. 
                (ii) If a DMA channel is used, set up the DMAQNUM to map the event to the respective event 
                     queue. 
        2.  Parameter set setup 
            (a) Program the PaRAM set number associated with the channel. Note that if it is a QDMA channel, 
                the PaRAM entry that is configured as trigger word is written to last. Alternatively, enable the 
                QDMA channel (step 1-b-ii above) just before the write to the trigger word. 
                See Section 5.3 for parameter set field setups for different types of transfers. See the sections on 
                chaining (Section 5.2.8) and interrupt completion (Section 5.2.9) on how to set up final/intermediate 
                completion chaining and/or interrupts. 
        3.  Interrupt setup 
            (a) Enable the interrupt in the IER/IERH by writing into IESR/IESRH. 
            (b) Ensure that the EDMA3CC completion interrupt (either the global or the shadow region interrupt) is 
                enabled properly in the device interrupt controller. 
            (c) Ensure the EDMA3CC completion interrupt (this refers to either the Global interrupt or the shadow 
                region interrupt) is enabled properly in the Device Interrupt controller. 
            (d) Set up the interrupt controller properly to receive the expected EDMA3 interrupt. 
        4.  Initiate transfer 
            (a) This step is highly dependent on the event trigger source: 
                (i)  If the source is an external event coming from a peripheral, the peripheral will be enabled to 
                     start generating relevant EDMA3 events that can be latched to the ER transfer. 
                (ii) For QDMA events, writes to the trigger word (step 2-a above) will initiate the transfer. 
                (iii)  Manually triggered transfers will be initiated by writes to the Event Set Registers (ESR/ESRH). 
                (iv) Chained-trigger events initiate when a previous transfer returns a transfer completion code 
                     equal to the chained channel number. 

        5.   Wait for completion 
              (a) If the interrupts are enabled as mentioned in step 3 above, then the EDMA3CC will generate a 
                  completion interrupt to the CPU whenever transfer completion results in setting the corresponding 
                  bits in the interrupt pending register (IPR/IPRH). The set bits must be cleared in the IPR\IPRH by 
                  writing to corresponding bit in ICR\ICRH. 
              (b) If polling for completion (interrupts not enabled in the device controller), then the application code 
                  can wait on the expected bits to be set in the IPR\IPRH. Again, the set bits in the IPR\IPRH must 
                  be manually cleared via ICR\ICRH before the next set of transfers is performed for the same 
                  transfer completion code values. 

1． 初始化一个DMA/QDMA通道

l  确定通道类型：QDMA或DMA？

l  通道映射

I．             如果使用QDMA，编程QCHMAP：确定通道对应哪个参数集号和触发字

II．           如果使用DMA通道，编程DCHMAP：确定通道对应哪个参数集号。

l  如果通道使用阴影区域，确保DRAE/DRAEH配置合适，以便通过阴影区域寄存器来存取事件寄存器和中断寄存器。随后步骤都应该是使用阴影区域寄存器

l  确定触发类型：

I．             如果外部事件被用于触发（DMA通道），通过写EESR/EESRH来使能EER/EERH里对应的事件

II．           如果QDMA被使用，通过写QEESR来使能QEER里的通道

l  Queue设置

I．             如果使用QDMA通道，通过设置QDMAQNUM来映射通道到对应的事件队列里

II．           如果使用DMA通道，通过设置DMAQNUM来映射通道到对应的事件队列里

2． 参数设置

l  编程通道对应的PaRAM集。如果是QDMA，则触发字最后写。或者在写触发字之前先使能QDMA通道。

3． 中断设置

l  通过写IESR/IESRH使能IER/IERH

l  确保EDMA3CC完成中断（全局或阴影区域中断）在DSP的中断控制器里被使能

l  正确配置中断控制器接收预期的EDMA3中断

4． 启动传输

这一步取决于事件触发源：

l  如果源是来自外设的外部事件，外设能启动产生相关的EDMA3的事件。

l  对于QDMA，写触发字，会触发传输

l  手动触发：写ESR/ESRH寄存器对应位。

l  链接触发事件触发：发生在先前的传输返回一个传输完成码等于链接的通道号时。

5． 等待传输完成

l  如果按上面提到的第3步使能了中断，那么EDMA3CC会给CPU产生一个传输完成中断，IPR/IPRH的相应位置位，这一位必须通过ICR/ICRH相应位清楚。

l  也可以查询是否完成，就是说程序等待IPR/IPRH位置位。为了下次传输，这位必须通过ICR/ICRH手动来清0。