DSP F28335的SCI模块

28335之SCI模块

1.介绍

    TMS320F28335内部有三个SCI模块，SCIA、SCIB、SCIC。

    每一个SCI模块都有一个接收器和发送器，SCI的接收器和发送器各有一个16级的FIFO(First In First Out先入先出)队列，它们都还有自己独立的使能位和中断位；可以工作在半双工或全双工模式；

    串行通信的三种方式：

     

2.SCI深入

    A. GPIO的管脚对应如下:

  SCIA对应GPIO28/29和GPIO35/36两组可选；

  SCIB有四组管脚可以选择，分别是 O9/11,GPIO14/15,GPIO18/19,GPIO22/23；

  SCIC对应的是GPIO62/63。

    

    在编程初始化时，需要先将对应的GPIO管脚配置为SCI模式，才能使得这些管脚具有SCI功能；

    

   

    B. SCI通信中带有格式信息的数据字符叫帧，下面是典型的数据帧格式

   

    C. 下面单独介绍一下SCI波特率设置寄存器SCIHBAUD和SCILBAUD，0-15是高字节与低字节连在一起，构成16位波特率设置寄存器BRR。

    BRR = SCIHBAUD + SCILBAUD

    如果1<= BRR <=65535，那么SCI波特率=LSPCLK / ( (BRR+1) * 8 )，由此，可以带入你需要的波特率，既可以得到BRR的值；

    如果BRR = 0，那么SCI波特率=LSPCLK/ 16

   D. SCI模块发送和接受数据的原理：

3.SCI串口编程

   A.先初始化IO管脚 (以SCI-A为例，SCI-B、SCI-C的初始化方法一样，就是照着改对应的管脚就行)

1. void InitSciaGpio() //初始化SCIA的GPIO管脚为例子
2. {
3. EALLOW;
4. //根据硬件设计决定采用GPIO28/29和GPIO35/36中的哪一组。这里以35/36为例
5. //定义管脚为上拉
6. GpioCtrlRegs.GPBPUD.bit.GPIO36 = 0;
7. GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0;
9. //定义管脚为异步输入
10. GpioCtrlRegs.GPBQSEL1.bit.GPIO36 = 3;
12. //配置管脚为SCI功能管脚
13. GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 1;
14. GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 1;
16. EDIS;
17. }

   B.SCI初始化配置

1. void scia_init()
2. {
3. SciaRegs.SCICCR.all = 0x0007; // 1 stop bit, No loopback
4. // No parity,8 char bits,
5. // async mode, idle-line protocol
7. SciaRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
8. // Disable RX ERR, SLEEP, TXWAKE
10. SciaRegs.SCICTL2.bit.TXINTENA = 1; //发送中断使能
11. SciaRegs.SCICTL2.bit.RXBKINTENA = 1; //接收中断使能
13. SciaRegs.SCIHBAUD = 0x0001; // 9600 baud @LSPCLK = 37.5MHz.
14. SciaRegs.SCILBAUD = 0x00E7;
16. SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
17. }

   C.接着进行中断的配置

1. EALLOW; // This is needed to write to EALLOW protected registers
2. PieVectTable.SCIRXINTA = &sciaRxIsr;
3. PieVectTable.SCITXINTA = &sciaTxIsr;
4. PieVectTable.SCIRXINTB = &scibRxIsr;
5. PieVectTable.SCITXINTB = &scibTxIsr;
6. EDIS; // This is needed to disable write to EALLOW protected registers

       D.上面是将SCIA和SCIB的中断服务程序连到PIE的中断表中，发生中断就会跑到你的ISR去了， 下面是开中断：

1. PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
2. PieCtrlRegs.PIEIER9.bit.INTx1= 1; // PIE Group 9, int1
3. PieCtrlRegs.PIEIER9.bit.INTx2= 1; // PIE Group 9, INT2
4. PieCtrlRegs.PIEIER9.bit.INTx3= 1; // PIE Group 9, INT3
5. PieCtrlRegs.PIEIER9.bit.INTx4= 1; // PIE Group 9, INT4
6. IER = 0x100; // Enable CPU INT
7. EINT;

    这样串口基本就OK了。

上面的配置是配置典型的串口中断程序；

下面是一个SCI例程：

1. /*
2. * Serial.c
3. *
4. * Created on: 2014-12-8
5. * Author: SCOTT
6. */
9. #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
10. #include "DSP2833x_Examples.h" // CPU_FRQ_100MHZ is in it!
12. void scib_fifo_init()
13. {
14. ScibRegs.SCIFFTX.all = 0xe040;
15. ScibRegs.SCIFFRX.all = 0x204f;
16. ScibRegs.SCIFFCT.all = 0x0;
17. }
19. /*
20. void scib_echoback_init()
21. {
22. ScibRegs.SCICCR.all = 0x0007; // one stop bit,8 data bit,No parity, No Lookback
23. ScibRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
24. // Disable RX ERR, SLEEP, TXWAKE
25. ScibRegs.SCICTL2.all =0x0003;
26. ScibRegs.SCICTL2.bit.TXINTENA = 1; // TX interrupt enable
27. ScibRegs.SCICTL2.bit.RXBKINTENA =1;
28. #if (CPU_FRQ_150MHZ)
29. ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 37.5MHz. 150/4 = 37.5MHZ
30. ScibRegs.SCILBAUD =0x00E7;
31. #endif
32. #if (CPU_FRQ_100MHZ)
33. ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 20MHz.
34. ScibRegs.SCILBAUD =0x0044;
35. #endif
36. ScibRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
37. }
39. */
42. void scib_echoback_init()
43. {
44. ScibRegs.SCICCR.all = 0x0007; // one stop bit,8 data bit,No parity, No Lookback
45. ScibRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
46. // Disable RX ERR, SLEEP, TXWAKE
47. ScibRegs.SCICTL2.all = 0x0003; // RX TX Interrupt enable
48. ScibRegs.SCICTL2.bit.TXINTENA = 1; // TX interrupt enable
49. ScibRegs.SCICTL2.bit.RXBKINTENA = 1; // RX interrupt enable
50. #if (CPU_FRQ_150MHZ)
51. ScibRegs.SCIHBAUD = 0x0001; // 9600 baud @LSPCLK = 37.5MHz. 150/4 = 37.5MHZ
52. ScibRegs.SCILBAUD = 0x00E7;
53. #endif
54. #if (CPU_FRQ_100MHZ)
55. ScibRegs.SCIHBAUD = 0x0001; // 9600 baud @LSPCLK = 20MHz.
56. ScibRegs.SCILBAUD = 0x0044;
57. #endif
58. ScibRegs.SCIFFTX.all = 0xC020;
59. ScibRegs.SCIFFRX.all = 0x0021; // Receive FIFO generates interrupt when the FIFO status bits (RXFFST4–0) and FIFO level bits
60. //(RXFFIL4–0) match (i.e., are greater than or equal to). Default value of these bits after reset //–11111. This will avoid frequent interrupts, after reset, as the receive FIFO will be empty mos // t of the time.
61. ScibRegs.SCIFFCT.all = 0x00;
62. ScibRegs.SCIFFTX.bit.TXFIFOXRESET= 1;
63. ScibRegs.SCIFFRX.bit.RXFIFORESET= 1;
64. ScibRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset
65. }
67. void scib_xmit(int c)
68. {
69. //while (ScicRegs.SCIFFTX.bit.TXFFST != 0) {} //==0 -> transmit BUF is empty,can receive new data
70. while(ScibRegs.SCICTL2.bit.TXRDY != 1){} //also right,but the way of tool's display is different
71. ScibRegs.SCITXBUF = c;
72. }
74. void scib_msg(char *msg)
75. {
76. int i;
77. i = 0;
78. while( '\0' != msg[i])
79. {
80. scib_xmit(msg[i]);
81. i++;
82. }
83. }
85. Uint16 scib_rvc()
86. {
87. Uint16 data = 0x0000;
88. while(ScibRegs.SCIFFRX.bit.RXFFST == 0){}
89. data = ScibRegs.SCIRXBUF.all;
91. while(ScibRegs.SCICTL2.bit.TXRDY != 1){}
92. ScibRegs.SCITXBUF = (data & 0xff);
93. return data;
94. }
96. /*No More*/