三态缓存 Tri-state buffer

• 1. Tri-state buffer logic function

Tri-state buffer acts as a switch in digital circuit by isolating a signal path in a circuit. This switch can attain three logical states. The three states are 0, 1 and ‘Z’. The logical state 0 and 1 are possible when the switch is CLOSE（开关闭合）. The logical value ‘Z’ or high impedance is attained when switch is OPEN（开关断开）. So when switch is open the input to tristate buffer is isolated from the circuit and output can be driven by some other logical path on a shared connection/bus. 

Depending on the active level of ENA, there are two kind of tri-state buffer: tri-state buffer with high-active ENA, inverting tri-state buffer with low-active ENA. Their truth-tables are shown as below:

 

Truth table for tri-state buffer

ENA	In	Out
0	0	Z
0	1	Z
1	0	0
1	1	1

Truth-table for inverting tri-state buffer

ENA	In	Out
0	0	0
0	1	1
1	0	Z
1	1	Z

 

• 2. Verilog example

// Tristate Buffer
module tristate_buffer(input_x, enable, output_x);
    input input_x;
    input enable;
    output output_x;

    assign output_x = enable? input_x : 'bz;

endmodule

 

• 3. tri-state usage

Tristate buffers can be used for shared bus interfaces, bidirectional IOs and shared memory interfaces. These onchip implementations allows bi-directional IO’s to switch polarities from input to output. Also when used on external chip-memory interface, these can switch to floating or high Z outputs to allow other devices on the same shared bus to access same memory.

一个最基本的应用例是I2C总线的SDA信号线。SDA是双向信号线，I2C master和I2C slave之间的数据信号通过SDA进行传输，有时候是master向slave发送数据，有时候是master从slave接收数据。以下是用于模拟双向三态IO口的verilog模型。

// Bi-Directional Tristate Buffer to modelling bi-directional IO.
module BIDIR_TRISTATE_BUF
#(
    parameter    P_WIDTH   = 8'd1       //  
)
(
    input               tx_enable, 

    input [P_WIDTH-1:0] tx_data  , 
    output[P_WIDTH-1:0] rx_data  , 

    inout [P_WIDTH-1:0] bidir_x);    
     
    assign bidir_x = tx_enable? tx_data : {P_WIDTH{'bz}};
    
    assign rx_data = {P_WIDTH{~tx_enable}}&bidir_x;
    
endmodule

在I2C总线建模中，Master和Slave端分别实例化一个BIDIR_TRISTATE_BUF，将SDA连接到bidir_x端子，然后直接相连即可实现双向（半双工通信）。