【海思篇】【Hi3516DV300】四、uboot有线网口调试

目的:熟悉uboot下有线网口;让更多的爱好者了解海思、加入海思。

目录

1 uboot下修改PHY芯片的PHYADDR和添加PHY_ID支持

1). 修改PHYADDR

2). 添加PHYID

3). 时钟配置

2 uboot有线网口测试

3 总结


1 uboot下修改PHY芯片的PHYADDR和添加PHY_ID支持

1). 修改PHYADDR

cd Hi3516CV500_SDK_V2.0.1.1/osdrv/opensource/uboot/u-boot-2016.11
vi include/configs/hi3516dv300.h

软件上的PHYADDR配置要根据每个人板子上的PHY芯片手册查询;

/*-----------------------------------------------------------------------
 * HIETH driver
 -----------------------------------------------------------------------*/
/* default is hieth-switch-fabric */
#ifdef CONFIG_NET_HISFV300
        #define HISFV_RESET_PHY_BY_CRG
        #define HISFV_MII_MODE                          0
        #define HISFV_RMII_MODE                         1
        #define HIETH_MII_RMII_MODE_U                   HISFV_RMII_MODE
        #define HIETH_MII_RMII_MODE_D                   HISFV_RMII_MODE
#if 1   // add by wei
        #define HISFV_PHY_U                             0
        #define HISFV_PHY_D                             1
        // add by wei end
#else
        #define HISFV_PHY_U                             1
        #define HISFV_PHY_D                             2
#endif
#endif /* CONFIG_NET_HISFV300 */

2). 添加PHYID

vi ./drivers/net/hisfv300/mii-drv.c

添加PHY的新宏PHY_ID_KSZ8081_SM, 这个PHYID每个人要根据自己板子上的PHY芯片手册查询;

#define PHY_ID_KSZ8081_SM       0x00221561 // add by wei for my phy

if ((phy_id & PHY_ID_MASK) == PHY_ID_KSZ8081 || (phy_id & PHY_ID_MASK) == PHY_ID_KSZ8081_SM) { // add by wei

#define PHY_ID_KSZ8051          0x00221550
#define PHY_ID_KSZ8081          0x00221560
#define PHY_ID_KSZ8081_SM       0x00221561 // add by wei for my phy 
#define PHY_ID_MASK             0xFFFFFFF0


...


//added by wzh 2009-4-15
bool phy_detected(const char *devname, unsigned char phyaddr)
{
        printf("phy_detected devname=%s phyadd=%x[wei]\n", devname, phyaddr);
        u32 phy_id = 0;
        u16 id1 = 0, id2 = 0;

        if (miiphy_read(devname, phyaddr, MII_PHYSID1, &id1)) {
                printf("%s,%d:PHY_PHYIDR1 read failed!\n", __func__, __LINE__);
                return false;
        }
        if (miiphy_read(devname, phyaddr, MII_PHYSID2, &id2)) {
                printf("%s,%d:PHY_PHYIDR2 read failed!\n", __func__, __LINE__);
                return false;
        }

        phy_id = (id1 & 0xffff) << 16;
        phy_id |= (id2 & 0xffff);
        printf("phy_id = 0x%x[wei]\n", phy_id);

        /* If the phy_id is all Fs, there is no device there */
        if (0xffffffff == phy_id || 0 == phy_id
                || phy_id == 0xFFFF || phy_id == 0xFFFF0000)
        {
                return false;
        }

        /* run this at RMII mode */
        if (HIETH_MII_RMII_MODE_U == 1)
        {
                /* PHY-KSZ8051RNL */
                if ((phy_id & PHY_ID_MASK) == PHY_ID_KSZ8051) {
                        unsigned short reg = 0;

                        if (miiphy_read(devname, phyaddr, 0x1F, ®)) {
                                printf("PHY 0x1F read failed\n");
                                return false;
                        }
                        reg |= BIT(7); /* set phy RMII 50MHz clk;*/
                        if (miiphy_write(devname, phyaddr, 0x1F, reg)) {
                                printf("PHY 0x1F write failed\n");
                                return false;
                        }

                        if (miiphy_read(devname, phyaddr, 0x16, ®)) {
                                printf("PHY 0x16 read failed\n");
                                return false;
                        }
                        reg |= BIT(1); /* set phy RMII override; */
                        if (miiphy_write(devname, phyaddr, 0x16, reg)) {
                                printf("PHY 0x16 write failed\n");
                                return false;
                        }
                }

                /* PHY-KSZ8081 */
                if ((phy_id & PHY_ID_MASK) == PHY_ID_KSZ8081
                        || (phy_id & PHY_ID_MASK) == PHY_ID_KSZ8081_SM) { // add by wei
                        printf("PHY_ID_KSZ8081[wei]\n");
                        unsigned short val = 0;

                        if (miiphy_read(devname, phyaddr, 0x1F, &val) != 0) {
                                printf("PHY 0x1F read failed\n");
                                return false;
                        };
                        val |= BIT(7);       /* set phy RMII 50MHz clk; */
                        if (miiphy_write(devname, phyaddr, 0x1F, val) != 0) {
                                printf("PHY 0x1F write failed\n");
                                return false;
                        }
                        printf("set phy RMII 50MHz clk[wei]\n");
                }
        }
        return true;
}

3). 时钟配置

这个uboot里配置是RMII模式,无需修改;定义在hi3516dv300.h中

【海思篇】【Hi3516DV300】四、uboot有线网口调试_第1张图片

vi ./drivers/net/hisfv300/net-drv.c

【海思篇】【Hi3516DV300】四、uboot有线网口调试_第2张图片

2 uboot有线网口测试

hisilicon # setenv serverip 192.168.1.74
hisilicon # setenv ethaddr FE:FC:AC:98:E8:01
hisilicon # setenv ipaddr 192.168.1.75      
hisilicon # setenv netmask 255.255.255.0
hisilicon # setenv gatewayip 192.168.1.1 
hisilicon # ping 192.168.1.74
Hisilicon ETH net controler
phy_id = 0x221561[wei]
eth0 : phy status change : LINK=UP : DUPLEX=FULL : SPEED=100M
Using eth0 device
host 192.168.1.74 is alive
hisilicon # 
hisilicon # printenv
arch=arm
baudrate=115200
board=hi3516dv300
board_name=hi3516dv300
bootargs=mem=512M console=ttyAMA0,115200 root=/dev/mtdblock2 rootfstype=jffs2 rw mtdparts=hi_sfc:1M(boot),5M(kernel),26M(rootfs)
bootcmd=sf probe 0;sf read 0x82000000 0x100000 0x500000;bootm 0x82000000
bootdelay=2
cpu=armv7
ethact=eth0
ethaddr=FE:FC:AC:98:E8:01
gatewayip=192.168.1.1
ipaddr=192.168.1.75
netmask=255.255.255.0
serverip=192.168.1.74
soc=hi3516dv300
stderr=serial
stdin=serial
stdout=serial
vendor=hisilicon
verify=n

Environment size: 540/262140 bytes

3 总结

1 确定海思板上的PHY芯片的PHYADDR和PHYID;如果地址不对的结果是linux下ifconfig -a没有eth0网口,uboot下是ping不同;

uboot下错误log如下:

eth0 : phy status change : LINK=UP : DUPLEX=HALF : SPEED=10M

2 使用Hi3516DV300的RMII模式,PHY芯片的clock脚要接RMII_CLK而不是EPHY_CLK,我的就是这个接错了,导致现象是uboot下ping不同,linux下也是如此,而且ifconifg eth0没有RUNNING标志,同时板子上的网络灯也不亮不闪;

linux下错误log如下:

hisi-femac 10010000.ethernet eth0: Link is Up - 10Mbps/Half - flow control off
IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
hisi-femac 10010000.ethernet eth0: Link is Down

 

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