8086 instructions (compact)

ADD	ADC	INC
SUB	SBB	DEC
NEG	CMP
MUL	IMUL
DAA	DAS	AAA	AAS
AND	OR	XOR	NOT	TEST
SHL	SHR	SAL	SAR
ROL	ROR	RCL	RCR
MOV	MOVSB	MOVSW	STOSB	STOSW	LODSB	LODSW	REP	CLD	STD
CMPSB	CMPSW	SCASB	SCASW	REPE	REPNE	REPZ	REPNZ
IN	OUT
JMP	JZ	JNZ	JS	JNS	JO	JNO	JP	JNP	JB	JNB

状态标志说明: 1 - 指令设置该标志位为1 0 - 指令设置该标志位为0 r - 标志位的值依赖于指令的返回指 ? - 标志位的值不确定(1或0都有可能)
指令	操作数	描述
ADD	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Add. Algorithm: operand1 = operand1 + operand2 Example: C Z S O P A r r r r r r
ADC	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Add with Carry. Algorithm: operand1 = operand1 + operand2 + CF Example: C Z S O P A r r r r r r
INC	REG memory	Increment. Algorithm: operand = operand + 1 Example: Z S O P A r r r r r CF - unchanged!
SUB	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Subtract. Algorithm: operand1 = operand1 - operand2 Example: C Z S O P A r r r r r r
SBB	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Subtract with Borrow. Algorithm: operand1 = operand1 - operand2 - CF Example: C Z S O P A r r r r r r
DEC	REG memory	Decrement. Algorithm: operand = operand - 1 Example: Z S O P A r r r r r CF - unchanged!
NEG	REG memory	Negate. Makes operand negative (two's complement). Algorithm: Invert all bits of the operand Add 1 to inverted operand Example: C Z S O P A r r r r r r
CMP	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Compare. Algorithm: operand1 - operand2 result is not stored anywhere, flags are set (OF, SF, ZF, AF, PF, CF) according to result. Example: C Z S O P A r r r r r r
MUL	REG memory	Unsigned multiply. Algorithm: when operand is a byte: AX = AL * operand. when operand is a word: (DX AX) = AX * operand. Example: C Z S O P A r ? ? r ? ? CF=OF=0 when high section of the result is zero.
IMUL	REG memory	Signed multiply. Algorithm: when operand is a byte: AX = AL * operand. when operand is a word: (DX AX) = AX * operand. Example: C Z S O P A r ? ? r ? ? CF=OF=0 when result fits into operand of IMUL.
DAA	No operands	Decimal adjust After Addition. Corrects the result of addition of two packed BCD values. Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL + 6 AF = 1 if AL > 9Fh or CF = 1 then: AL = AL + 60h CF = 1 Example: C Z S O P A r r r r r r
DAS	No operands	Decimal adjust After Subtraction. Corrects the result of subtraction of two packed BCD values. Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL - 6 AF = 1 if AL > 9Fh or CF = 1 then: AL = AL - 60h CF = 1 Example: C Z S O P A r r r r r r
AAA	No operands	ASCII Adjust after Addition. Corrects result in AH and AL after addition when working with BCD values. It works according to the following Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL + 6 AH = AH + 1 AF = 1 CF = 1 else AF = 0 CF = 0 in both cases: clear the high nibble of AL. Example: C Z S O P A r ? ? ? ? r
AAS	No operands	ASCII Adjust after Subtraction. Corrects result in AH and AL after subtraction when working with BCD values. Algorithm: if low nibble of AL > 9 or AF = 1 then: AL = AL - 6 AH = AH - 1 AF = 1 CF = 1 else AF = 0 CF = 0 in both cases: clear the high nibble of AL. Example: C Z S O P A r ? ? ? ? r
AND	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Logical AND between all bits of two operands. Result is stored in operand1. These rules apply: 1 AND 1 = 1 1 AND 0 = 0 0 AND 1 = 0 0 AND 0 = 0 Example: C Z S O P 0 r r 0 r
OR	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Logical OR between all bits of two operands. Result is stored in first operand. These rules apply: 1 OR 1 = 1 1 OR 0 = 1 0 OR 1 = 1 0 OR 0 = 0 Example: C Z S O P A 0 r r 0 r ?
XOR	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Logical XOR (Exclusive OR) between all bits of two operands. Result is stored in first operand. These rules apply: 1 XOR 1 = 0 1 XOR 0 = 1 0 XOR 1 = 1 0 XOR 0 = 0 Example: C Z S O P A 0 r r 0 r ?
NOT	REG memory	Invert each bit of the operand. Algorithm: if bit is 1 turn it to 0. if bit is 0 turn it to 1. Example: C Z S O P A unchanged
TEST	REG, memory memory, REG REG, REG memory, immediate REG, immediate	Logical AND between all bits of two operands for flags only. These flags are effected: ZF, SF, PF. Result is not stored anywhere. These rules apply: 1 AND 1 = 1 1 AND 0 = 0 0 AND 1 = 0 0 AND 0 = 0 Example: C Z S O P 0 r r 0 r
SHL	memory, immediate REG, immediate memory, CL REG, CL	Shift operand1 Left. The number of shifts is set by operand2. Algorithm: Shift all bits left, the bit that goes off is set to CF. Zero bit is inserted to the right-most position. Example: C O r r OF=0 if first operand keeps original sign.
SHR	memory, immediate REG, immediate memory, CL REG, CL	Shift operand1 Right. The number of shifts is set by operand2. Algorithm: Shift all bits right, the bit that goes off is set to CF. Zero bit is inserted to the left-most position. Example: C O r r OF=0 if first operand keeps original sign.
SAL	memory, immediate REG, immediate memory, CL REG, CL	Shift Arithmetic operand1 Left. The number of shifts is set by operand2. Algorithm: Shift all bits left, the bit that goes off is set to CF. Zero bit is inserted to the right-most position. Example: C O r r OF=0 if first operand keeps original sign.
SAR	memory, immediate REG, immediate memory, CL REG, CL	Shift Arithmetic operand1 Right. The number of shifts is set by operand2. Algorithm: Shift all bits right, the bit that goes off is set to CF. The sign bit that is inserted to the left-most position has the same value as before shift. Example: C O r r OF=0 if first operand keeps original sign.
ROL	memory, immediate REG, immediate memory, CL REG, CL	Rotate operand1 left. The number of rotates is set by operand2. Algorithm: shift all bits left, the bit that goes off is set to CF and the same bit is inserted to the right-most position. Example: C O r r OF=0 if first operand keeps original sign.
ROR	memory, immediate REG, immediate memory, CL REG, CL	Rotate operand1 right. The number of rotates is set by operand2. Algorithm: shift all bits right, the bit that goes off is set to CF and the same bit is inserted to the left-most position. Example: C O r r OF=0 if first operand keeps original sign.
RCL	memory, immediate REG, immediate memory, CL REG, CL	Rotate operand1 left through Carry Flag. The number of rotates is set by operand2. When immediate is greater then 1, assembler generates several RCL xx, 1 instructions because 8086 has machine code only for this instruction (the same principle works for all other shift/rotate instructions). Algorithm: shift all bits left, the bit that goes off is set to CF and previous value of CF is inserted to the right-most position. Example: C O r r OF=0 if first operand keeps original sign.
RCR	memory, immediate REG, immediate memory, CL REG, CL	Rotate operand1 right through Carry Flag. The number of rotates is set by operand2. Algorithm: shift all bits right, the bit that goes off is set to CF and previous value of CF is inserted to the left-most position. Example: C O r r OF=0 if first operand keeps original sign.
MOV	REG, memory memory, REG REG, REG memory, immediate REG, immediate SREG, memory memory, SREG REG, SREG SREG, REG	Copy operand2 to operand1. The MOV instruction cannot: set the value of the CS and IP registers. copy value of one segment register to another segment register (should copy to general register first). copy immediate value to segment register (should copy to general register first). Algorithm: operand1 = operand2 Example: C Z S O P A unchanged
MOVSB	No operands	Copy byte at DS:[SI] to ES:[DI]. Update SI and DI. Algorithm: ES:[DI] = DS:[SI] if DF = 0 then SI = SI + 1 DI = DI + 1 else SI = SI - 1 DI = DI - 1 Example: C Z S O P A unchanged
MOVSW	No operands	Copy word at DS:[SI] to ES:[DI]. Update SI and DI. Algorithm: ES:[DI] = DS:[SI] if DF = 0 then SI = SI + 2 DI = DI + 2 else SI = SI - 2 DI = DI - 2 Example: C Z S O P A unchanged
STOSB	No operands	Store byte in AL into ES:[DI]. Update SI. Algorithm: ES:[DI] = AL if DF = 0 then DI = DI + 1 else DI = DI - 1 Example: C Z S O P A unchanged
STOSW	No operands	Store word in AX into ES:[DI]. Update SI. Algorithm: ES:[DI] = AX if DF = 0 then DI = DI + 2 else DI = DI - 2 Example: C Z S O P A unchanged
LODSB	No operands	Load byte at DS:[SI] into AL. Update SI. Algorithm: AL = DS:[SI] if DF = 0 then SI = SI + 1 else SI = SI - 1 Example: C Z S O P A unchanged
LODSW	No operands	Load word at DS:[SI] into AX. Update SI. Algorithm: AX = DS:[SI] if DF = 0 then SI = SI + 2 else SI = SI - 2 Example: C Z S O P A unchanged
REP	chain instruction	Repeat following MOVSB, MOVSW, LODSB, LODSW, STOSB, STOSW instructions CX times. Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX - 1 go back to check_cx else exit from REP cycle Z r
CLD	No operands	Clear Direction flag. SI and DI will be incremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW. Algorithm: DF = 0 D 0
STD	No operands	Set Direction flag. SI and DI will be decremented by chain instructions: CMPSB, CMPSW, LODSB, LODSW, MOVSB, MOVSW, STOSB, STOSW. Algorithm: DF = 1 D 1
CMPSB	No operands	Compare bytes: ES:[DI] from DS:[SI]. Algorithm: DS:[SI] - ES:[DI] set flags according to result: OF, SF, ZF, AF, PF, CF if DF = 0 then SI = SI + 1 DI = DI + 1 else SI = SI - 1 DI = DI - 1 Example: see cmpsb.asm in Samples. C Z S O P A r r r r r r
CMPSW	No operands	Compare words: ES:[DI] from DS:[SI]. Algorithm: DS:[SI] - ES:[DI] set flags according to result: OF, SF, ZF, AF, PF, CF if DF = 0 then SI = SI + 2 DI = DI + 2 else SI = SI - 2 DI = DI - 2 Example: see cmpsw.asm in Samples. C Z S O P A r r r r r r
SCASB	No operands	Compare bytes: AL from ES:[DI]. Algorithm: ES:[DI] - AL set flags according to result: OF, SF, ZF, AF, PF, CF if DF = 0 then DI = DI + 1 else DI = DI - 1 C Z S O P A r r r r r r
SCASW	No operands	Compare words: AX from ES:[DI]. Algorithm: ES:[DI] - AX set flags according to result: OF, SF, ZF, AF, PF, CF if DF = 0 then DI = DI + 2 else DI = DI - 2 C Z S O P A r r r r r r
REPE	chain instruction	Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Equal), maximum CX times. Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX - 1 if ZF = 1 then: go back to check_cx else exit from REPE cycle else exit from REPE cycle Example: see cmpsb.asm in Samples. Z r
REPNE	chain instruction	Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Equal), maximum CX times. Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX - 1 if ZF = 0 then: go back to check_cx else exit from REPNE cycle else exit from REPNE cycle Z r
REPZ	chain instruction	Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 1 (result is Zero), maximum CX times. Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX - 1 if ZF = 1 then: go back to check_cx else exit from REPZ cycle else exit from REPZ cycle Z r
REPNZ	chain instruction	Repeat following CMPSB, CMPSW, SCASB, SCASW instructions while ZF = 0 (result is Not Zero), maximum CX times. Algorithm: check_cx: if CX <> 0 then do following chain instruction CX = CX - 1 if ZF = 0 then: go back to check_cx else exit from REPNZ cycle else exit from REPNZ cycle Z r
IN	AL, im.byte AL, DX AX, im.byte AX, DX	Input from port into AL or AX. Second operand is a port number. If required to access port number over 255 - DX register should be used. Example: C Z S O P A unchanged
OUT	im.byte, AL im.byte, AX DX, AL DX, AX	Output from AL or AX to port. First operand is a port number. If required to access port number over 255 - DX register should be used. Example: C Z S O P A unchanged
JMP	label 4-byte address	Unconditional Jump. Transfers control to another part of the program. 4-byte address may be entered in this form: 1234h:5678h, first value is a segment second value is an offset. Algorithm: always jump Example: C Z S O P A unchanged
JZ	label	Short Jump if Zero (equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm: if ZF = 1 then jump Example: C Z S O P A unchanged
JNZ	label	Short Jump if Not Zero (not equal). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm: if ZF = 0 then jump Example: C Z S O P A unchanged
JS	label	Short Jump if Signed (if negative). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm: if SF = 1 then jump Example: C Z S O P A unchanged
JNS	label	Short Jump if Not Signed (if positive). Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm: if SF = 0 then jump Example: C Z S O P A unchanged
JO	label	Short Jump if Overflow. Algorithm: if OF = 1 then jump Example: C Z S O P A unchanged
JNO	label	Short Jump if Not Overflow. Algorithm: if OF = 0 then jump Example: C Z S O P A unchanged
JP	label	Short Jump if Parity (even). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm: if PF = 1 then jump Example: C Z S O P A unchanged
JNP	label	Short Jump if No Parity (odd). Only 8 low bits of result are checked. Set by CMP, SUB, ADD, TEST, AND, OR, XOR instructions. Algorithm: if PF = 0 then jump Example: C Z S O P A unchanged
JB	label	Short Jump if first operand is Below second operand (as set by CMP instruction). Unsigned. Algorithm: if CF = 1 then jump Example: C Z S O P A unchanged
JNB	label	Short Jump if first operand is Not Below second operand (as set by CMP instruction). Unsigned. Algorithm: if CF = 0 then jump Example: C Z S O P A unchanged