segger jlink 工程设置

1.jlink烧写SDRAM

    如果要用jlink下载程序到SDRAM，那么一定要先初始化好SDRAM。

    初始化SDRAM方法

    方法一：用init.bin对SDRAM进行初始化。

    其实就是启动代码的SDRAM初始化部分的提取，然后将其烧写到内部的前4K的SRAM中。初始化好SDRAM.以后，再通过jlilnk下载程序到SDRAM。

    方法二：在J-FLASH ARM工具本身就可进行相关 的配置，如下图所示。

    这个里面配置，选择Project settings ->CPU。在 这个页面里面选择core 是ARM9   ...Little endian.

    在 Use following init sequence：里面填写初始化寄存器序列。

    然后到 target下有个connect，然后初始化下，注意看窗口的调试信息。
    如果正确初始化了。则可以向SDRAM里下载数据了。

    注：初始化配置顺序参考：

    Write 32Bit 0x53000000 0x00000000 ; pWTCON , 看门狗定时器控制寄存器
   Write 32Bit 0x4A000008 0xFFFFFFFF ; INTMSK , 中断屏蔽寄存器 
   Write 32Bit 0x4A00001C 0x000007FF ; INTSUBMSK , 针对INTMAK具体化的一个中断请求屏蔽寄存器
   Write 32Bit 0x53000000 0x00000000 ; pWTCON , 看门狗定时器控制寄存器
   Write 32Bit 0x56000050 0x000055AA ; rGPFCON , Port F control
   Write 32Bit 0x4C000014 0x00000007 ; CLKDIVN , CPU时钟分频控制寄存器
   Write 32Bit 0x4C000000 0x00FFFFFF ; LOCKTIME , 锁时计数寄存器 
   Write 32Bit 0x4C000004 0x00061012 ; MPLLCON , MPLL寄存器
   Write 32Bit 0x4C000008 0x00040042 ; UPLLCON , UPLL寄存器
   Write 32Bit 0x48000000 0x22111120 ; Bus width & wait status
   Write 32Bit 0x48000004 0x00002F50 ; Boot ROM control
   Write 32Bit 0x48000008 0x00000700 ; BANK1 control
   Write 32Bit 0x4800000C 0x00000700 ; BANK2 control
   Write 32Bit 0x48000010 0x00000700 ; BANK3 control
   Write 32Bit 0x48000014 0x00000700 ; BANK4 control
   Write 32Bit 0x48000018 0x0007FFFC ; BANK5 control
   Write 32Bit 0x4800001C 0x00018005 ; BANK6 control
   Write  32Bit 0x48000020 0x00018005 ; BANK7 control
   Write 32Bit 0x48000024 0x008E0459 ; DRAM/SDRAM refresh
   Write 32Bit 0x48000028 0x00000032 ; Flexible Bank Size
   Write 32Bit 0x4800002C 0x00000030 ; Mode register set for SDRAM
   Write 32Bit 0x48000030 0x00000030 ; Mode register set for SDRAM
    刚打开jlink command 看了下，输入?号，提示jlink command的命令。发现有可以memery测试的。
    看下 mem  ,w1,w2,w3,wm这几个命令。

2.Jlink工程设置

    caution

    Before creating a new J-Flash project, you should have an understanding of your tar-get system:
    1）Take a look at the schematic and the documentation of your CPU / SOC.
    2）Make sure the CPU runs at a decent speed (at least a few MHz, not just 32kHz)
    3）If necessary, enable & select a PLL as clock source.
    4）Locate RAM (Ideally on-chip RAM, even if it is just a 4KB) in the chip documentation.
    5）If necessary, use external RAM (usually SDRAM). You may have to setup theexternal bus interface.
    6）If necessary, use external FLASH. You may also have to setup the external bus interface to program the external flash since in a lot of cases, it allows perdefault just reading of flash memory.
    7）Last but not least, you should make sure the JTAG speed is as high as possible(on ARM-S cores with RTCK, Adaptive is  usually a good choice; if not, 8Mhz or 12MHz is ideal. However, this should be the last step)

    Note: Initialization of the PLL and the external bus interface has to be done in the init sequence of the project.

    sequence of creating a project file

    In the following all the necessary steps to create a project file, are explained.
    1. Select File ->  New Project to open a new project.
    2. Open the Project Settings context menu. Select Options -> Project Settings or press ALT-F7 to open the Project settings dialog and select the type of con-nection to J-Link.

    

    Select Engineering (More options, typically used for setup) .

    3. Define the JTAG speed before init and the  JTAG speed after init. The default settings work without any problem for the most targets.
    Since software version 3.80 J-Flash supports SWD. To select SWD as target inter-face, simply select  SWD  from the dropdown box and define the  SWD speed before init and the  SWD speed after init.

    

    4. Open the CPU dialog and select the core architecture in the  Core choice-list to use J-Flash with an external flash chip. Set the endianess, core ID, RAM address and RAM size of the used MCU.
    To program the internal flash of the chip choose a device from Device  choice-list.J-Flash uses correct default values (endianess, core ID, RAM address and size) for this device. This is the part where initialization of the external bus interface(if necessary) has to be done. For more information about the valid commands which can be used in an initialization sequence, please refer to  Init sequence onpage 33.

    

    Init sequence

    Many microcontrollers require an initialization sequence for different reasons: When powered on, the PLL may not be initialized, which means the chip is very slow or a watchdog must be disabled manually. To use these chips you must first perform the required initialization.
    This dialog allows the user to enter a cu stom initialization sequence using a pre-defined list of operations. After choosing an operation and corresponding values to be associated with the operation, a comment may be added to make it easier for others to determine its effect. The following list shows all valid commands which can be used in an init sequence:

    

    

    5. The Flash dialog is dependent on selection in the CPU dialog. If you want to pro-gram external flash the dialog should look similar to the screenshot below. The used flash chip can be automatically detected or chosen from a list if you disablethe Automatic detection checkbox. If you choose the  Automatic detection feature, the only required settings are the  Base Addr,  Organization and  Chip(s) fields.

    

    If you want to program the internal flash of an MCU （或者自己指定了特定的外部flash），the dialog should look similar to the screenshot below. Normally, all de fault settings can be used without modi-fications.

    

    6. In the  Production dialog is secondary for a setup. You can define the behaviour of the Auto option (Target  -> Auto or shortcut: F7).

    

    7. Save your project (File -> Save Project) and test it.

    8.Example init sequence

    A good example of a typical init sequence  is the init sequence of an AT91SAM7 CPU.The following example is excerpted from  the J-Flash project for the AT91SAM7S256.
    The example init sequence step by step
    0. Reset the target with J-Link reset strategy 0 and 0 delay.
    1. Disable the watchdog by writing to the Watchdog Timer Mode Register.
    2. Set flash wait states  by writing to the MC Flash Mode Register.
    3. Set the PLL by writing to power management controller.
    4. Set a delay of 200ms.
    5. Set the PLL and the divider by writing to PLL Register of the power management controller.
    6. Set a delay of 200ms.
    7. Set the master and processor clock by writ ing to the Master Clock Register of the power management controller.
    The steps implemented in J-Flash:

    

参考文献：1.http://idln.blog.163.com/blog/static/2218956020104891824756/

                    2.http://www.ebaina.com/bbs/thread-1431-1-1.html

                    3.J-Flash ARM User guide of the standalone flash programming software（Software Version 4.24 Manual Rev. 0）