[200722] How to online debug TMS320F28377D (CCS8.2)?

Task

Figure out guideline to online debug 28377D(CPU1 and CPU2, CCS8.2)

Target

1. Find out guideline to operate
2. Practice it.

Plan

2020/7/22

Execution

[200722] online debug of CPU1

This is easy, similar to single core DSP.
See spracf0_C2000 MCU JTAG Connectivity Debug.pdf for reference.

Step1: Open ‘Target Configuration File’
Step2: Select ‘simulator’ type and ‘device model’.
Step3: ‘Test connection’

[200722] online debug of CPU2

In the project, under target you have target configuration file (with extension .ccxml).

Please right click on that and then click on “Launch Selected Configuration”(maybe you need to check ‘Auto Run and Launch Options’ and the Launch Options is correct as below, option1 and option2 is enabled, while option3 is disabled).

Once it’s lunched, right click on CPU1 and click on connect and also connect CPU2.

Then click on “Run” icon on top and select load and brows the .out file to load.

[200722] practice on CPU1

Online debugging of CPU1 was simple, similar to single-core DSP, and done successfully.

[200722] practice on CPU2

Failed and got this error:

C28xx_CPU2: GEL Output: 
Memory Map Initialization Complete
C28xx_CPU2: If erase/program (E/P) operation is being done on one core, the other core should not execute from shared-RAM (SR) as they are used for the E/P code.  Also, CPU1 will be halted to determine SR ownership for the CPU which will run the Flash Plugin code, after which CPU1 will be set to run its application. User code execution from SR could commence after both flash banks are programmed.
C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
C28xx_CPU2: Error occurred during flash operation: Timed out waiting for target to halt while executing wr_pll.alg
C28xx_CPU2: Error writing the PLL values (Flash algorithm timed out). Operation cancelled.
C28xx_CPU2: Perform a debugger reset and execute the Boot-ROM code (click on the RESUME button in CCS debug window) before erasing/loading the Flash.  If that does not help to perform a successful Flash erase/load, check the Reset cause (RESC) register, NMI shadow flag (NMISHDFLG) register and the Boot-ROM status register for further debug.
C28xx_CPU2: Trouble Removing Breakpoint with the Action "Remain Halted" at 0xc0eb: (Error -1066 @ 0xC0EB) Unable to set/clear requested breakpoint. Verify that the breakpoint address is in valid memory. (Emulation package 8.0.27.9) 
C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
C28xx_CPU2: Error setting the GSxMSEL register for Flash operations
C28xx_CPU2: File Loader: Memory write failed: Unknown error
C28xx_CPU2: GEL: File: D:\FW_Works\Mario\ens_controller\trunk\controller\SAFETY_HEX_OUT\MARIO_SAFETY_APP.out: Load failed.
C28xx_CPU2: Error occurred during flash operation: No core matches the pattern 'CPU1'
C28xx_CPU2: Error setting the GSxMSEL register for Flash operations

Workout procedure:

Step1: Start debug by connecting to CPU1

Step2: Load .out to both CPU1 and CPU2

Step3: CPU Reset and Restart both CPU1 and CPU2(optional)

Step4: Let CPU1 go into Runing status

Step5: Online debug CPU2

Feedback

[200722]make sure CPU1 is connected and halted when you are trying to download the code on CPU2

[200722]make sure CPU1 is running when you need to online debug CPU2.

Output

Reference

[1] flash_programming_cpu02 won’t download to controlCARD (TMS320F28377D)