CPSW program sequence

CPSW

Introduction

The peripheral is compliant to IEEE 802.3 standard, describing the Carrier Sense Multiple Access with Collision Detection (CSMA/CD) Access Method and Physical Layer specifications. CPSW has one host port and two slave ports, each of which are capable of 10/100/1000 Mbps with MII/GMII/RGMII interfaces. The CPSW also has an Address Lookup Engine which processes all received packets to determine which port(s) if any that the packet should the forwarded to. The ALE uses the incoming packet received port number, destination address, source address, length/type, and VLAN information to determine how the packet should be forwarded. The CPSW incorporates an 8kB internal RAM to hold CPDMA buffer descriptors (also known as CPPI RAM). The MDIO module implements the 802.3 serial management interface to interrogate and control up to 32 Ethernet PHYs connected to the device by using a shared two-wire bus. The application shall use the MDIO module to configure the auto negotiation parameters of each PHY attached to the CPSW slave ports, retrieve the negotiation results, and configure required parameters in the CPSW module for correct operation.

The APIs for configuring and using CPSW, MDIO and generic PHYs are exported in /include/cpsw.h, /include/mdio.h and /include/phy.h respectively.

Programming Sequence

• Give proper settings for enabling CPSW interface at the chip configuration module.
  • Enable the pin multiplexing for CPSW by invoking the API ‘CPSWPinMuxSetup()’
  • According to the EVM settings, determine the MII transfer mode and enable the interface. In case of RGMII, ‘EVMPortRGMIIModeSelect()’ can be used to enable RGMII mode in the chip configuration
• Reset the CPSW hardware. Each submodule can be reset by calling the APIs ‘CPSWSSReset()’, ‘CPSWCPDMAReset()’ and ‘ CPSWWrReset()’.
• Initialize the MDIO Module using ‘MDIOInit()’. Enough delay shall be given to ensure the successful completion of the MDIO module initialization before any further access to MDIO.
• Initialize the ALE logic and clear the entries in the ALE table using ’CPSWALEInit()’
• Set the port states for each port used inside the ALE by invoking ‘CPSWALEPortStateSet()’
• Set the ALE table entries for unicast/multicast with the required Ethernet address (MAC address). The MAC address can be read by invoking the API ‘EVMMACAddrGet()’
• If port statistics need to be enabled, enable using ‘CPSWStatisticsEnable()’
• Initialize and configure the slave ports
  • Reset the sliver logic (which correspond to slave port), by invoking the API ‘CPSWSlReset()’
  • Set the MAC address for the slave ports using ‘CPSWPortSrcAddrSet()’
  • Auto negotiate with the PHY device connected through the MDIO, if the phy is alive. Respective PHY Auto negotiation API can be used for this.
  • According to the Auto negotiation results from the PHY, set the GMII/MII/RGMII mode and the duplex of transmission for CPSW using ‘CPSWSlTransferModeSet()’.
• Initialize the TX and RX buffer descriptors in the CPPI RAM, which is local to the CPSW.
• Enable the transmission and reception at CPDMA using ‘CPSWCPDMATxEnable()’ and CPSWCPDMARxEnable()’
• Enable the GMII/RGMII interface at CPSW by invoking ‘CPSWSlRGMIIEnable()’ for all the slave ports to be used
• Enable interrupt generation.
  • Enable the transmission/reception interrupt generation at CPDMA using ’CPSWCPDMATxIntEnable()’ and ‘ CPSWCPDMARxIntEnable()’
  • Enable the transmission/reception interrupt generation at CPSW wrapper module for the required core using ‘CPSWWrCoreIntEnable()’
• In the receive interrupt handler, the buffer descriptors associated with a received packet can be found using the SOP(Start Of Packet)/EOP(End Of Packet) fields of the buffer descriptor. After the packet is processed, the completion pointer shall be written using ‘CPSWCPDMARxCPWrite()’ to acknowledge the CPDMA. After the receive interrupt handler processes all the received packets, the CPSW shall acknowledge the end of interrupt processing with ‘CPSWCPDMAEndOfIntVectorWrite()’.
• In the transmit interrupt handler, the buffer descriptors associated with a transmitted packets shall be freed by writing, the completion pointer shall be written using ‘CPSWCPDMATxCPWrite()’ . After the transmit interrupt handler processes all the transmitted packets, the CPSW shall acknowledge the end of interrupt processing with ‘CPSWCPDMAEndOfIntVectorWrite()’.