移植u-boot-2018.09到OK6410 (4) --- 完结篇
到今天， 移植uboot-201809的进展总算达到了我的预期目标。 中间，因为S3c6410这颗芯片，SD控制器部分的相关时钟控制一直没搞明白，导致SD启动不了，整整卡了2个月没有进展，当时差点没坚持下来，后来通过各种迂回，反向理清SD内容（三星cpu spec写得还不够细啊）。
源码已上传，见我的资源：https://download.csdn.net/download/Golden_Chen/11998917
以下就是预期中的几大功能：
启动方式： Nand-boot 、MMC-boot
烧录方式： USB、tftp
界面显示：支持
在线更新：支持
附上，几张演示图
上图就是 Nand的一键在线uboot更新 命令：
nand write.uboot memaddr
Nand 的tftp一键烧录命令：
tftpnand [file] 其中file是tftp服务器上的文件路径，默认是 u-boot-nand.bin
MMC的一键在线uboot更新命令类似：
mmc write.uboot memaddr
tftpmmc [file] 其中file是tftp服务器上的文件路径，默认是 u-boot-mmc.bin
需要 u-boot-nand.bin 和u-boot-mmc.bin 的， 可以从我的下载资料里面下
注意第一次烧录，可以用飞凌自带的SD-writer.exe将u-boot-nand.bin烧录到OK6410上，之后就可以用uboot里面的功能更新其他了。
以下是MMC的烧录日志和启动日志
OK6410 # fatinfo mmc 0:1
Interface: MMC
Device 0: Vendor: Man 000002 Snr bd458d00 Rev: 11.0 Prod: SD04GS
Type: Removable Hard Disk
Capacity: 3780.0 MB = 3.6 GB (7741440 x 512)
Filesystem: FAT32 "NO NAME "
OK6410 # fatls mmc 0:1
System Volume Information/
503524 u-boot-mmc1.bin
1765280 linux3.8.8_zImage
3586908 zImage
3 file(s), 1 dir(s)
OK6410 # dnw
Insert a OTG cable into the connector!
OTG cable Connected!
Now, Waiting for DNW to transmit data
Download Done!! Download Address: 0x50008000, Download Filesize:0x7b2cc
Checksum is being calculated.
Checksum O.K.
OK6410 # mmc write.uboot 50008000
Erasing env sectors ...
MMC erase: dev # 0, block # 7740366, count 32 ... sdhci_send_command: MMC: 0 bus
y timeout increasing to: 200 ms.
sdhci_send_command: MMC: 0 busy timeout increasing to: 400 ms.
32 blocks erase: OK
Upate BL1 to SD/MMC....
MMC write: dev # 0, block # 7740398, count 16 ... 16 blocks written: OK
Upate BL2 to SD/MMC....
MMC write: dev # 0, block # 7739342, count 1008 ... 1008 blocks written: OK
OK6410 #OK++--OK++--
U-Boot 2018.09 (Apr 07 2019 - 08:31:17 -0700) for OK6410
****************************************
** u-boot 201809 **
** Updated for OK6410 Board **
** Version 1.0 (2018/10/13) **
** OEM: Golden Creation **
****************************************
CPU: S3C6410 @532MHz
Mclk = 532MHz, Eclk = 96MHz
Hclk = 133MHz, Pclk = 66MHz
Serial-source = PCLK (SYNC Mode)
Model: Samsung SMDK6410 based on S3C6410
Board: SMDK6410
DRAM: 256 MiB
DRAM: No arch specific invalidate_icache_all available!
dev(clock@1800000) bind!
dev(sdhci@7C200000): sdhc bind ...
NAND: select s3c_nand_oob_mlc_128
nand_base: device found, Manufacturer ID: 0xec, Chip ID: 0xd5
nand_base: Samsung NAND 2GiB 3,3V 8-bit
nand_base: Samsung NAND 2GiB 3,3V 8-bit
nand_base: 2048 MiB, MLC, erase size: 512 KiB, page size: 4096, OOB size: 218
2048 MiB
MMC: s3c64xx_clk_probe,probe...
dev(sdhci@7C200000): sdhc probe ...
dev(sdhci@7C200000): source clock "sclk-mmc0",freq=96000000 Hz
S3C64XX_SDHCI: 0
Loading Environment from NAND... *** Warning - bad CRC, using default environmen
t
Failed (-5)
LCD source clock:266000000 Hz, want: 29880900 Hz
LCD working VCLK:33250000 Hz
In: serial
Out: lcd
Err: serial
Net: dm9000
Hit any key to stop autoboot: 0
NAND read: device 0 offset 0x300000, size 0x180000
1572864 bytes read: OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0x0
Linux version 3.8.8-gee1ecca-dirty (golden@golden-presario) (gcc version 4.4.1 (
Sourcery G++ Lite 2009q3-67) ) #29 Sat Nov 28 16:10:44 CST 2015
CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: SMDK6410
Memory policy: ECC disabled, Data cache writeback
CPU S3C6410 (id 0x36410101)
S3C24XX Clocks, Copyright 2004 Simtec Electronics
S3C64XX: PLL settings, A=532000000, M=532000000, E=96000000
S3C64XX: HCLK2=266000000, HCLK=133000000, PCLK=66500000
mout_apll: source is fout_apll (1), rate is 532000000
mout_epll: source is epll (1), rate is 96000000
mout_mpll: source is mpll (1), rate is 532000000
usb-bus-host: source is clk_48m (0), rate is 48000000
irda-bus: source is mout_epll (0), rate is 96000000
CPU: found DTCM0 8k @ 00000000, not enabled
CPU: moved DTCM0 8k to fffe8000, enabled
CPU: found DTCM1 8k @ 00000000, not enabled
CPU: moved DTCM1 8k to fffea000, enabled
CPU: found ITCM0 8k @ 00000000, not enabled
CPU: moved ITCM0 8k to fffe0000, enabled
CPU: found ITCM1 8k @ 00000000, not enabled
CPU: moved ITCM1 8k to fffe2000, enabled
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
Kernel command line: root=/dev/mtdblock2 rootfstype=cramfs console=ttySAC0,11520
0
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
__ex_table already sorted, skipping sort
Memory: 256MB = 256MB total
Memory: 256296k/256296k available, 5848k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
DTCM : 0xfffe8000 - 0xfffec000 ( 16 kB)
ITCM : 0xfffe0000 - 0xfffe4000 ( 16 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xd0800000 - 0xff000000 ( 744 MB)
lowmem : 0xc0000000 - 0xd0000000 ( 256 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.text : 0xc0008000 - 0xc02eed70 (2972 kB)
.init : 0xc02ef000 - 0xc030dfe4 ( 124 kB)
.data : 0xc030e000 - 0xc033f700 ( 198 kB)
.bss : 0xc0340000 - 0xc03733e4 ( 205 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:246
VIC @f6000000: id 0x00041192, vendor 0x41
VIC @f6010000: id 0x00041192, vendor 0x41
sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 4294967286ms
Console: colour dummy device 80x30
Calibrating delay loop... 353.89 BogoMIPS (lpj=1769472)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x5022c5c8 - 0x5022c624
DMA: preallocated 256 KiB pool for atomic coherent allocations
s3c64xx_dma_init: Registering DMA channels
PL080: IRQ 73, at d0846000, channels 0..8
PL080: IRQ 74, at d0848000, channels 8..16
S3C6410: Initialising architecture
bio: create slab at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
s3c-i2c s3c2440-i2c.0: slave address 0x10
s3c-i2c s3c2440-i2c.0: bus frequency set to 64 KHz
s3c-i2c s3c2440-i2c.0: i2c-0: S3C I2C adapter
s3c-i2c s3c2440-i2c.1: slave address 0x10
s3c-i2c s3c2440-i2c.1: bus frequency set to 64 KHz
s3c-i2c s3c2440-i2c.1: i2c-1: S3C I2C adapter
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Console: switching to colour frame buffer device 80x30
s3c-fb s3c-fb: window 0: fb
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
s3c6400-uart.0: ttySAC0 at MMIO 0x7f005000 (irq = 69) is a S3C6400/10
console [ttySAC0] enabled
s3c6400-uart.1: ttySAC1 at MMIO 0x7f005400 (irq = 70) is a S3C6400/10
s3c6400-uart.2: ttySAC2 at MMIO 0x7f005800 (irq = 71) is a S3C6400/10
s3c6400-uart.3: ttySAC3 at MMIO 0x7f005c00 (irq = 72) is a S3C6400/10
brd: module loaded
loop: module loaded
at24 0-0050: 1024 byte 24c08 EEPROM, writable, 1 bytes/write
at24 1-0057: 16384 byte 24c128 EEPROM, writable, 1 bytes/write
S3C NAND Driver, (c) 2008 Samsung Electronics
nand probe. pagesize: 0,cellinfo: 0x94,tmp: 0x29
dev_id == 0xd5 select s3c_nand_oob_mlc_128
S3C NAND Driver is using hardware ECC.
NAND device: Manufacturer ID: 0xec, Chip ID: 0xd5 (Samsung NAND 2GiB 3,3V 8-bit)
, 2048MiB, page size: 4096, OOB size: 218
Creating 5 MTD partitions on "NAND 2GiB 3,3V 8-bit":
0x000000000000-0x000000100000 : "Bootloader"
0x000000100000-0x000000600000 : "Kernel"
0x000000600000-0x000007400000 : "User"
0x000007400000-0x00000b000000 : "bad-blocks"
0x00000b000000-0x000080000000 : "File System"