1.直接修改已经fetch到tmp目录的dtsi文件
$ vi ./tmp/work-shared/xarina-s-evb/kernel-source/arch/arm/boot/dts/xarina_standard_spi_pl022.dtsi
pl022,com-mode = <2>;
pl022,rx-level-trig = <1>;
pl022,tx-level-trig = <1>;
pl022,duplex = <0>;
};
};
spi_b: spi@ff28c000 {
compatible = "arm,pl022", "arm,primecell";
arm,primecell-periphid = <0x41022>;
reg = <0xff28c000 0x1000>;
interrupts =
clocks = <&clk_spi_b 0>, <&apb_pclk 0>;
clock-names = "spiclk", "apb_pclk";
dmas = <&dmacc 3 1>, <&dmacc 2 1>;
dma-names = "tx", "rx";
num-cs = <1>;
cs-gpios = <&gpio_m0 3 3>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
slave@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <250000>;
pl022,interface = <0>;
pl022,slave-tx-disable;
pl022,com-mode = <2>;
pl022,rx-level-trig = <1>;
pl022,tx-level-trig = <1>;
pl022,duplex = <0>;
};
};
spi_c: spi@ff28d000 {
compatible = "arm,pl022", "arm,primecell";
2. 清除内核工程的compile清除状态标志并重新编译
$bitbake -C compile linux-yocto (大写-C表示清除状态标志后再重新执行)
3. 重新编译整个工程并打包
$make -j16