ADI Blackfin DSP处理器-BF533的开发详解34：数字信号处理详解-IIR（含源代码）
硬件准备
ADSP-EDU-BF533：BF533开发板
AD-HP530ICE：ADI DSP仿真器
软件准备
Visual DSP++软件
硬件链接
功能介绍
IIR(Infinite Impulse Response)数字滤波器，又名“无限脉冲响应数字滤波器”，或“递归滤波器”。递归滤波器，也就是 IIR 数字滤波器，顾名思义，具有反馈，一般认为具有无限的脉冲响应。
代码实现了通过 VDSP 下的算法库实现 IIR 滤波器，对输入的波形进行滤波后输出，通过 Visual DSP 的 Polt工具可以查看输入的波形和滤波后产生的波形。
调试步骤
- 将工程文件 BF53x_IIR.dpj 载入 Visual DSP++软件，将软件与板卡连接。
- 将按下图打开工程下保存的.vdw 文件
- 在工程路径下找到 out_input.vdw 文件。
- 打开文件后能看到会弹出下面的窗口，蓝色线表示待滤波的数据，红色线标识滤波后的数据。
- 编译代码，并全速运行代码。
调试结果
代码运行后，会看到代表滤波后的数据的红线输出滤波后的波形。
程序源码
cpu.c
#ifndef CPU_H
#define CPU_H
#include
#include “cpu.h”
/**********************************************************************************
- 名称 ：Set_PLL
- 功能 ：初始化内核时钟和系统时钟
- 入口参数 ：pmsel pssel 设置参数
- 出口参数 ：无
***********/
void Set_PLL(int pmsel,int pssel)
{
int new_PLL_CTL;
pPLL_DIV = pssel;
asm(“ssync;”);
new_PLL_CTL = (pmsel & 0x3f) << 9;
pSIC_IWR |= 0xffffffff;
if (new_PLL_CTL != pPLL_CTL)
{
pPLL_CTL = new_PLL_CTL;
asm(“ssync;”);
asm(“idle;”);
}
}
/ - 名称 ：Setup_Flags
- 功能 ：初始化PF口
- 入口参数 ：无
- 出口参数 ：无
****************************************************************************/
void Setup_Flags(void)
{
*pFIO_INEN = 0x0020;
*pFIO_DIR = 0x001f;
*pFIO_EDGE = 0x0000;
*pFIO_MASKA_S = 0x0020;
*pFIO_POLAR = 0x0020;
}
/****************************************************************************
- 名称 ：Init_EBIU
- 功能 ：初始化并允许异步BANK存储器工作
- 入口参数 ：无
- 出口参数 ：无
****************************************************************************/
void Init_EBIU(void)
{
*pEBIU_AMBCTL0 = 0x7bb07bb0;
*pEBIU_AMBCTL1 = 0xffc0ffc0;
*pEBIU_AMGCTL = 0x000f;
}
/****************************************************************************
- 名称 ：Init_SDRAM
- 功能 ：初始化SDRAM
- 入口参数 ：无
- 出口参数 ：无
****************************************************************************/
void Init_SDRAM(void)
{
*pEBIU_SDRRC = 0x00000817;
*pEBIU_SDBCTL = 0x00000013;
*pEBIU_SDGCTL = 0x0091998d;
ssync();
}
/****************************************************************************
- 名称 ： delay
- 功能 ： 延时函数
- 入口参数 ：无
- 返回值 ：无
****************************************************************************/
void delay(unsigned int tem)
{
int i;
for(i=0;i
}
#endif
main.c
#include
#include
#include “cpu.h”
/* IIR数据长度 /
#define VEC_SIZE 256
/ IIR滤波器H参数个数 */
#define NUM_TAPS 5
/* IIR滤波输入数据 */
fract16 input[VEC_SIZE] = {
000000,0x4b3d,000000,0x79bc,000000,000000,000000,0x8644,
000000,0xb4c3,000000,0x4b3d,000000,0x79bc,000000,000000,
000000,0x8644,000000,0xb4c3,000000,0x4b3d,000000,0x79bc,
000000,000000,000000,0x8644,000000,0xb4c3,000000,0x4b3d,
000000,0x79bc,000000,000000,000000,0x8644,000000,0xb4c3,
000000,0x4b3d,000000,0x79bc,000000,000000,000000,0x8644,
000000,0xb4c3,000000,0x4b3d,000000,0x79bc,000000,000000,
000000,0x8644,000000,0xb4c3,000000,0x4b3d,000000,0x79bc,
000000,000000,000000,0x8644,000000,0xb4c3,000000,0x4b3d,
000000,0x79bc,000000,000000,000000,0x8644,000000,0xb4c3,
000000,0x4b3d,000000,0x79bc,000000,000000,000000,0x8644,
000000,0xb4c3,000000,0x4b3d,000000,0x79bc,000000,000000,
000000,0x8644,000000,0xb4c3,000000,0x4b3d,000000,0x79bc,
000000,000000,000000,0x8644,000000,0xb4c3,000000,0x4b3d,
000000,0x79bc,000000,000000,000000,0x8644,000000,0xb4c3,
000000,0x4b3d,000000,0x79bc,000000,000000,000000,0x8644,
000000,0xb4c3,000000,0x4b3d,000000,0x79bc,000000,000000,
000000,0x8644,000000,0xb4c3,000000,0x4b3d,000000,0x79bc,
000000,000000,000000,0x8644,000000,0xb4c3,000000,0x4b3d,
000000,0x79bc,000000,000000,000000,0x8644,000000,0xb4c3,
000000,0x4b3d,000000,0x79bc,000000,000000,000000,0x8644,
000000,0xb4c3,000000,0x4b3d,000000,0x79bc,000000,000000,
000000,0x8644,000000,0xb4c3,000000,0x4b3d,000000,0x79bc,
000000,000000,000000,0x8644,000000,0xb4c3,000000,0x4b3d,
000000,0x79bc,000000,000000,000000,0x8644,000000,0xb4c3,
000000,0x4b3d,000000,0x79bc,000000,000000,000000,0x8644,
000000,0xb4c3,000000,0x4b3d,000000,0x79bc,000000,000000,
000000,0x8644,000000,0xb4c3,000000,0x4b3d,000000,0x79bc,
000000,000000,000000,0x8644,000000,0xb4c3,000000,0x4b3d,
000000,0x79bc,000000,000000,000000,0x8644,000000,0xb4c3,
000000,0x4b3d,000000,0x79bc,000000,000000,000000,0x8644,
000000,0xb4c3,000000,0x4b3d,000000,0x79bc,000000,000000
};
/* IIR滤波H参数 */
fract16 coefs[NUM_TAPS] =
{
0xff57,
0xfd12,
0x0c62,
0x3735,
0x3735
};
fract16 delay1[2*NUM_TAPS];
/* IIR滤波输出数据 */
fract16 output[VEC_SIZE + NUM_TAPS - 1];
/* IIR滤波器状态变量 */
iir_state_fr16 state;
void main(void)
{
Set_PLL(16,4);
Init_EBIU();
Init_SDRAM();
/* IIR滤波初始化 */
iir_init(state, coefs, delay1, 1);
/* IIR滤波 */
iir_fr16(input, output, VEC_SIZE, &state);
}
iir.s
// blackfin-edinburgh-core
#include
#include
/
// standard
#define IVBh (EVT0 >> 16)
#define IVBl (EVT0 & 0xFFFF)
#define UNASSIGNED_VAL 0x8181
#define INTERRUPT_BITS 0x400 // just IVG15
#define SYSCFG_VALUE 0x30
.section/DOUBLEANY program;
.file_attr requiredForROMBoot;
.align 2;
start:
/* V D S G < i n s e r t − c o d e − v e r y − b e g i n n i n g > ∗ / . s t a r t o f u s e r c o d e v e r y b e g i n n i n g : / / I n s e r t a d d i t i o n a l c o d e t o b e e x e c u t e d b e f o r e a n y o t h e r S t a r t u p C o d e h e r e . / / T h i s c o d e i s p r e s e r v e d i f t h e C R T i s r e − g e n e r a t e d . . e n d o f u s e r c o d e v e r y b e g i n n i n g : / ∗ VDSG
/
// blackfin-edinburgh-core
#if WA_05000109
// Avoid Anomaly 05-00-0109
R1 = SYSCFG_VALUE;
SYSCFG = R1;
#endif
/
// standard
#if WA_05000229
// Avoid Anomaly 05-00-0229: DMA5_CONFIG and SPI_CTL not cleared on reset.
R1 = 0x400;
#if defined(ADSPBF538) || defined(ADSPBF539)
P0.L = SPI0_CTL & 0xFFFF;
P0.H = SPI0_CTL >> 16;
W[P0] = R1.L;
#else
P0.L = SPI_CTL & 0xFFFF;
P0.H = SPI_CTL >> 16;
W[P0] = R1.L;
#endif
P0.L = DMA5_CONFIG & 0xFFFF;
P0.H = DMA5_CONFIG >> 16;
R1 = 0;
W[P0] = R1.L;
#endif
// Clear loop counters to disable hardware loops
R7 = 0;
LC0 = R7;
LC1 = R7;
// Clear the DAG Length regs, to force linear addressing
L0 = R7;
L1 = R7;
L2 = R7;
L3 = R7;
// Clear ITEST_COMMAND and DTEST_COMMAND registers
I0.L = (ITEST_COMMAND & 0xFFFF);
I0.H = (ITEST_COMMAND >> 16);
I1.L = (DTEST_COMMAND & 0xFFFF);
I1.H = (DTEST_COMMAND >> 16);
[I0] = R7;
[I1] = R7;
CSYNC;
// Initialise the Event Vector table.
P0.H = IVBh;
P0.L = IVBl;
// Install __unknown_exception_occurred in EVT so that
// there is defined behaviour.
P0 += 2*4; // Skip Emulation and Reset
P1 = 13;
R1.L = __unknown_exception_occurred;
R1.H = __unknown_exception_occurred;
LSETUP (.ivt,.ivt) LC0 = P1;
.ivt: [P0++] = R1;
// Set IVG15's handler to be the start of the mode-change
// code. Then, before we return from the Reset back to user
// mode, we'll raise IVG15. This will mean we stay in supervisor
// mode, and continue from the mode-change point, but at a
// much lower priority.
P1.H = supervisor_mode;
P1.L = supervisor_mode;
[P0] = P1;
/
// standard
// Initialise the stack.
// Note: this points just past the end of the section.
// First write should be with [–SP].
SP.L=ldf_stack_end;
SP.H=ldf_stack_end;
usp = sp;
// We're still in supervisor mode at the moment, so the FP
// needs to point to the supervisor stack.
FP = SP;
// Make space for incoming "parameters" for functions
// we call from here:
SP += -12;
R0 = INTERRUPT_BITS;
R0 <<= 5; // Bits 0-4 not settable.
/
// install-default-handlers
CALL.X __install_default_handlers;
.extern __install_default_handlers;
.type __install_default_handlers,STT_FUNC;
/
// standard
R1 = SYSCFG;
R4 = R0; // Save modified list
BITSET(R1,1);
SYSCFG = R1; // Enable the cycle counter
/
// blackfin-edinburgh-core
#if WA_05000137 || WA_05000162
// Avoid Anomaly 02-00-0137
// Set the port preferences of DAG0 and DAG1 to be
// different; this gives better performance when
// performing daul-dag operations on SDRAM.
P0.L = DMEM_CONTROL & 0xFFFF;
P0.H = DMEM_CONTROL >> 16;
R0 = [P0];
BITSET(R0, 12);
BITCLR(R0, 13);
[P0] = R0;
CSYNC;
#endif
/* V D S G < i n s e r t − c o d e − e a r l y − s t a r t u p > ∗ / . s t a r t o f u s e r c o d e 1 : / / I n s e r t a d d i t i o n a l c o d e t o b e e x e c u t e d b e f o r e m a i n h e r e . / / T h i s c o d e i s p r e s e r v e d i f t h e C R T i s r e − g e n e r a t e d . . e n d o f u s e r c o d e 1 : / ∗ VDSG
/
// standard
// Enable interrupts
STI R4; // Using the mask from default handlers
RAISE 15;
// Move the processor into user mode.
P0.L=still_interrupt_in_ipend;
P0.H=still_interrupt_in_ipend;
RETI=P0;
NOP; // Purely to prevent a stall warning
still_interrupt_in_ipend:
// execute RTI until we’ve finished servicing all
// interrupts of priority higher than IVG15. Normally one
// would expect to only have the reset interrupt in IPEND
// being serviced, but occasionally when debugging this may
// not be the case - if restart is hit when servicing an
// interrupt.
//
// When we clear all bits from IPEND, we’ll enter user mode,
// then we’ll automatically jump to supervisor_mode to start
// servicing IVG15 (which we will ‘service’ for the whole
// program, so that the program is in supervisor mode.
// Need to do this to ‘finish’ servicing the reset interupt.
RTI;
supervisor_mode:
[–SP] = RETI; // re-enables the interrupt system
R0.L = UNASSIGNED_VAL;
R0.H = UNASSIGNED_VAL;
// Push a RETS and Old FP onto the stack, for sanity.
[--SP]=R0;
[--SP]=R0;
// Make sure the FP is sensible.
FP = SP;
// Leave space for incoming "parameters"
SP += -12;
/* V D S G < i n s e r t − c o d e − b e f o r e − d e v i c e − i n i t i a l i z a t i o n > ∗ / . s t a r t o f u s e r c o d e 2 : / / I n s e r t a d d i t i o n a l c o d e t o b e e x e c u t e d b e f o r e d e v i c e i n i t i a l i z a t i o n h e r e . / / T h i s c o d e i s p r e s e r v e d i f t h e C R T i s r e − g e n e r a t e d . . e n d o f u s e r c o d e 2 : / ∗ VDSG
/
// device-initialization
// initialise the devices known about for stdio.
CALL.X _init_devtab;
.extern _init_devtab;
.type _init_devtab,STT_FUNC;
/
// cplusplus
CALL.X ___ctorloop; // run global scope C++ constructors
.extern ___ctorloop;
.type ___ctorloop,STT_FUNC;
/* V D S G < i n s e r t − c o d e − b e f o r e − m a i n − e n t r y > ∗ / . s t a r t o f u s e r c o d e 3 : / / I n s e r t a d d i t i o n a l c o d e t o b e e x e c u t e d b e f o r e m a i n h e r e . / / T h i s c o d e i s p r e s e r v e d i f t h e C R T i s r e − g e n e r a t e d . . e n d o f u s e r c o d e 3 : / ∗ VDSG
/
// get-args
// Read command-line arguments.
CALL.X __getargv;
r1.l=__Argv;
r1.h=__Argv;
.extern __getargv;
.type __getargv,STT_FUNC;
.extern __Argv;
.type __Argv,STT_OBJECT;
/
// standard
// Call the application program.
CALL.X _main;
/
// call-exit
CALL.X _exit; // passing in main’s return value
.extern _exit;
.type _exit,STT_FUNC;
/
// standard
.start.end: // Required by the linker to know the size of the routine
// that is needed for absolute placement.
.global start;
.type start,STT_FUNC;
.extern _main;
.type _main,STT_FUNC;
.extern ldf_stack_end;
.extern __unknown_exception_occurred;
.type __unknown_exception_occurred,STT_FUNC;
/
// cplusplus
.section/DOUBLEANY ctor;
.align 4;
___ctor_table:
.byte4=0;
.global ___ctor_table;
.type ___ctor_table,STT_OBJECT;
.section/DOUBLEANY .gdt;
.align 4;
___eh_gdt:
.global ___eh_gdt;
.byte4=0;
.type ___eh_gdt,STT_OBJECT;
.section/DOUBLEANY .frt;
.align 4;
___eh_frt:
.global ___eh_frt;
.byte4=0;
.type ___eh_frt,STT_OBJECT;