Clion开发STM32之HAL库GPIO宏定义封装(最新版)

头文件

/*******************************************************************************
 *  Copyright (c) [scl]。保留所有权利。
 *     本文仅供个人学习和研究使用，禁止用于商业用途。
 ******************************************************************************/
#ifndef STM32_F1XX_TEMPLATE_BSP_GPIO_H
#define STM32_F1XX_TEMPLATE_BSP_GPIO_H

#include "sys_core.h"

#ifndef  sys_force_static_inline
#define sys_force_static_inline __attribute__((always_inline)) static inline
#endif
enum pin_enum {
    PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15,
    PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15,
    PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15,
    PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15,
    PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15,
    PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7, PF8, PF9, PF10, PF11, PF12, PF13, PF14, PF15,
};
typedef struct stm_pin_define {
    GPIO_TypeDef *port;
    uint32_t pin;
} stm_pin_define_t;
#define GPIO_A_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define GPIO_B_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define GPIO_C_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
#define GPIO_D_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define GPIO_E_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define GPIO_F_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
#define GPIO_G_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
/*端口定义: stm_port_define(A,12)->PA12 */
#define stm_port_define(__PORT__, PIN) GPIO##__PORT__,GPIO_PIN_##PIN

#define gpio_init(port, pin, mode, pull, speed)\
            do{\
                __HAL_RCC_##port##_CLK_ENABLE();\
                GPIO_InitTypeDef cnf ={pin,mode,pull,speed};\
                HAL_GPIO_Init(port, &cnf);\
            }while(0)
typedef enum {
    pin_mode_output,
    pin_mode_output_pull_up,
    pin_mode_output_pull_down,
    pin_mode_input,
    pin_mode_input_pull_up,
    pin_mode_input_analog,
    pin_mode_input_pull_down,
    pin_mode_output_od,
    pin_mode_output_af_pp,
} pin_mode_type;

sys_force_static_inline void stm_pin_set(GPIO_TypeDef *port, uint32_t pin, GPIO_PinState state) {
    HAL_GPIO_WritePin(port, pin, state);
}

sys_force_static_inline void stm_pin_high(GPIO_TypeDef *port, uint32_t pin) {
    HAL_GPIO_WritePin(port, pin, GPIO_PIN_SET);
}

sys_force_static_inline GPIO_PinState stm_pin_read(GPIO_TypeDef *port, uint32_t pin) {
    return HAL_GPIO_ReadPin(port, pin);
}

sys_force_static_inline void stm_pin_low(GPIO_TypeDef *port, uint32_t pin) {
    HAL_GPIO_WritePin(port, pin, GPIO_PIN_RESET);
}

sys_force_static_inline void stm_pin_toggle(GPIO_TypeDef *port, uint32_t pin) {
    HAL_GPIO_TogglePin(port, pin);
}

sys_force_static_inline void gpio_clk_enable(GPIO_TypeDef *port) {
    if (port == GPIOA)GPIO_A_CLK_ENABLE();
    else if (port == GPIOB)GPIO_B_CLK_ENABLE();
    else if (port == GPIOC)GPIO_C_CLK_ENABLE();
    else if (port == GPIOD)GPIO_D_CLK_ENABLE();
    else if (port == GPIOE)GPIO_E_CLK_ENABLE();
    else if (port == GPIOF)GPIO_F_CLK_ENABLE();
    else if (port == GPIOG)GPIO_G_CLK_ENABLE();
}

sys_force_static_inline void stm32_pin_mode(GPIO_TypeDef *port, uint32_t pin, pin_mode_type mode) {
    GPIO_InitTypeDef GPIO_InitStruct = {
            .Pin = pin, .Mode = GPIO_MODE_OUTPUT_PP, .Speed = GPIO_SPEED_FREQ_HIGH, .Pull = GPIO_NOPULL};
    gpio_clk_enable(port);
    switch (mode) {

        case pin_mode_output: {
            /* output setting */
            GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
            GPIO_InitStruct.Pull = GPIO_NOPULL;
            break;
        }
        case pin_mode_output_pull_up: {
            GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
            GPIO_InitStruct.Pull = GPIO_PULLUP;
            break;
        }
        case pin_mode_output_pull_down: {
            GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
            GPIO_InitStruct.Pull = GPIO_PULLDOWN;
            break;
        }
        case pin_mode_input: {
            /* input setting: not pull. */
            GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
            GPIO_InitStruct.Pull = GPIO_NOPULL;
            break;
        }
        case pin_mode_input_pull_up: {
            /* input setting: pull up. */
            GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
            GPIO_InitStruct.Pull = GPIO_PULLUP;
            break;
        }
        case pin_mode_input_pull_down: {
            /* input setting: pull down. */
            GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
            GPIO_InitStruct.Pull = GPIO_PULLDOWN;
            break;
        }
        case pin_mode_output_od: {
            /* output setting: od. */
            GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
            GPIO_InitStruct.Pull = GPIO_NOPULL;
            break;
        }
        case pin_mode_output_af_pp: {
            /* output setting: od. */
            GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
            GPIO_InitStruct.Pull = GPIO_NOPULL;
            break;
        }
        case pin_mode_input_analog: {
            GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
            break;
        }
    }
    HAL_GPIO_Init(port, &GPIO_InitStruct);
}

sys_force_static_inline void stm32_pin_define_mode_set(stm_pin_define_t *pin_define, pin_mode_type mode) {
    stm32_pin_mode(pin_define->port, pin_define->pin, mode);
}

sys_force_static_inline void stm32_pin_define_high(stm_pin_define_t *pin_define) {
    HAL_GPIO_WritePin(pin_define->port, pin_define->pin, GPIO_PIN_SET);
}

sys_force_static_inline void stm32_pin_define_low(stm_pin_define_t *pin_define) {
    HAL_GPIO_WritePin(pin_define->port, pin_define->pin, GPIO_PIN_RESET);
}

sys_force_static_inline void stm32_pin_define_set(stm_pin_define_t *pin_define, GPIO_PinState state) {
    HAL_GPIO_WritePin(pin_define->port, pin_define->pin, state);
}

sys_force_static_inline void stm32_pin_define_toggle(stm_pin_define_t *pin_define) {
    HAL_GPIO_TogglePin(pin_define->port, pin_define->pin);
}

sys_force_static_inline GPIO_PinState stm32_pin_define_read(stm_pin_define_t *pin_define) {
    return HAL_GPIO_ReadPin(pin_define->port, pin_define->pin);
}

struct stm_pin_define *stm_get_pin(enum pin_enum pin);


#endif //STM32_F1XX_TEMPLATE_BSP_GPIO_H

源文件

/*******************************************************************************
 Copyright (c) [scl]。保留所有权利。
 ******************************************************************************/
#include "stm32f1xx_hal.h"
#include "bsp_gpio.h"

struct stm_pin_map {
    enum pin_enum pin;
    struct stm_pin_define define;
};
static struct stm_pin_map pin_map[] = {
        {PA0,  {stm_port_define(A, 0)}},
        {PA1,  {stm_port_define(A, 1)}},
        {PA2,  {stm_port_define(A, 2)}},
        {PA3,  {stm_port_define(A, 3)}},
        {PA4,  {stm_port_define(A, 4)}},
        {PA5,  {stm_port_define(A, 5)}},
        {PA6,  {stm_port_define(A, 6)}},
        {PA7,  {stm_port_define(A, 7)}},
        {PA8,  {stm_port_define(A, 8)}},
        {PA9,  {stm_port_define(A, 9)}},
        {PA10, {stm_port_define(A, 10)}},
        {PA11, {stm_port_define(A, 11)}},
        {PA12, {stm_port_define(A, 12)}},
        {PA13, {stm_port_define(A, 13)}},
        {PA14, {stm_port_define(A, 14)}},
        {PA15, {stm_port_define(A, 15)}},
        {PB0,  {stm_port_define(B, 0)}},
        {PB1,  {stm_port_define(B, 1)}},
        {PB2,  {stm_port_define(B, 2)}},
        {PB3,  {stm_port_define(B, 3)}},
        {PB4,  {stm_port_define(B, 4)}},
        {PB5,  {stm_port_define(B, 5)}},
        {PB6,  {stm_port_define(B, 6)}},
        {PB7,  {stm_port_define(B, 7)}},
        {PB8,  {stm_port_define(B, 8)}},
        {PB9,  {stm_port_define(B, 9)}},
        {PB10, {stm_port_define(B, 10)}},
        {PB11, {stm_port_define(B, 11)}},
        {PB12, {stm_port_define(B, 12)}},
        {PB13, {stm_port_define(B, 13)}},
        {PB14, {stm_port_define(B, 14)}},
        {PB15, {stm_port_define(B, 15)}},
        {PC0,  {stm_port_define(C, 0)}},
        {PC1,  {stm_port_define(C, 1)}},
        {PC2,  {stm_port_define(C, 2)}},
        {PC3,  {stm_port_define(C, 3)}},
        {PC4,  {stm_port_define(C, 4)}},
        {PC5,  {stm_port_define(C, 5)}},
        {PC6,  {stm_port_define(C, 6)}},
        {PC7,  {stm_port_define(C, 7)}},
        {PC8,  {stm_port_define(C, 8)}},
        {PC9,  {stm_port_define(C, 9)}},
        {PC10, {stm_port_define(C, 10)}},
        {PC11, {stm_port_define(C, 11)}},
        {PC12, {stm_port_define(C, 12)}},
        {PC13, {stm_port_define(C, 13)}},
        {PC14, {stm_port_define(C, 14)}},
        {PC15, {stm_port_define(C, 15)}},
        {PD0,  {stm_port_define(D, 0)}},
        {PD1,  {stm_port_define(D, 1)}},
        {PD2,  {stm_port_define(D, 2)}},
        {PD3,  {stm_port_define(D, 3)}},
        {PD4,  {stm_port_define(D, 4)}},
        {PD5,  {stm_port_define(D, 5)}},
        {PD6,  {stm_port_define(D, 6)}},
        {PD7,  {stm_port_define(D, 7)}},
        {PD8,  {stm_port_define(D, 8)}},
        {PD9,  {stm_port_define(D, 9)}},
        {PD10, {stm_port_define(D, 10)}},
        {PD11, {stm_port_define(D, 11)}},
        {PD12, {stm_port_define(D, 12)}},
        {PD13, {stm_port_define(D, 13)}},
        {PD14, {stm_port_define(D, 14)}},
        {PD15, {stm_port_define(D, 15)}},
        {PE0,  {stm_port_define(E, 0)}},
        {PE1,  {stm_port_define(E, 1)}},
        {PE2,  {stm_port_define(E, 2)}},
        {PE3,  {stm_port_define(E, 3)}},
        {PE4,  {stm_port_define(E, 4)}},
        {PE5,  {stm_port_define(E, 5)}},
        {PE6,  {stm_port_define(E, 6)}},
        {PE7,  {stm_port_define(E, 7)}},
        {PE8,  {stm_port_define(E, 8)}},
        {PE9,  {stm_port_define(E, 9)}},
        {PE10, {stm_port_define(E, 10)}},
        {PE11, {stm_port_define(E, 11)}},
        {PE12, {stm_port_define(E, 12)}},
        {PE13, {stm_port_define(E, 13)}},
        {PE14, {stm_port_define(E, 14)}},
        {PE15, {stm_port_define(E, 15)}},
        {PF0,  {stm_port_define(F, 0)}},
        {PF1,  {stm_port_define(F, 1)}},
        {PF2,  {stm_port_define(F, 2)}},
        {PF3,  {stm_port_define(F, 3)}},
        {PF4,  {stm_port_define(F, 4)}},
        {PF5,  {stm_port_define(F, 5)}},
        {PF6,  {stm_port_define(F, 6)}},
        {PF7,  {stm_port_define(F, 7)}},
        {PF8,  {stm_port_define(F, 8)}},
        {PF9,  {stm_port_define(F, 9)}},
        {PF10, {stm_port_define(F, 10)}},
        {PF11, {stm_port_define(F, 11)}},
        {PF12, {stm_port_define(F, 12)}},
        {PF13, {stm_port_define(F, 13)}},
        {PF14, {stm_port_define(F, 14)}},
        {PF15, {stm_port_define(F, 15)}}
};

struct stm_pin_define *stm_get_pin(enum pin_enum pin) {
    return &pin_map[pin].define;
}