【MT7628AN】IOT | MT7628AN OpenWRT开发与学习

IOT | MT7628AN OpenWRT开发与学习


时间2023-06-21

文章目录

    • `IOT` | `MT7628AN` `OpenWRT`[开发与学习](https://blog.csdn.net/I_feige/article/details/132911634?csdn_share_tail=%7B%22type%22%3A%22blog%22%2C%22rType%22%3A%22article%22%2C%22rId%22%3A%22132911634%22%2C%22source%22%3A%22I_feige%22%7D)
    • 1.相关资料
    • 2.开发板示意图
    • 3.上电开机
      • 3-1.登录账户及密码
      • 启动LOG:
    • 4.开发
      • 4-1.`uboot`开发
        • 4-1-1.代码下载
        • 4-1-2.解压交叉编译工具链
          • 查看`gcc342`:
          • 查看`java`版本:
        • 4-1-3.编译
    • 5.备份无线校准文件
    • 6.升级

1.相关资料

1.Widora模组BIT3.1 BIT5.1b mt7628AN 核心板WIFI 网关御用方案-淘宝网 (taobao.com)

2.开发资料:Mango Pi official website | Tiny and Elegant SBC | 7688dev

3.备份WI-FI校准数据,非常重要 Mango Pi official website | Tiny and Elegant SBC | backup

4.刷机:Mango Pi official website | Tiny and Elegant SBC | flash

5.widora · GitHub


6.项目代码:

u-boot-mt7688: https://mangopi.cc/firmware (gitee.com)

openwrt_widora: https://mangopi.cc/7688dev (gitee.com)

项目管理 - PingCode


2.开发板示意图

【MT7628AN】IOT | MT7628AN OpenWRT开发与学习_第1张图片


【MT7628AN】IOT | MT7628AN OpenWRT开发与学习_第2张图片

3.上电开机

3-1.登录账户及密码

给开发板连上网线USB线(供电和查看串口信息输出);

linux系统控制台登录的默认账户:root,密码:12345678

启动LOG:

Widora by mango,V1.0.9

Board: Ralink APSoC DRAM:  128 MB
relocate_code Pointer at: 87fb4000
flash manufacture id: ef, device id 40 19
find flash: W25Q256FV
*** Warning - bad CRC, using default environment

============================================ 
Ralink UBoot Version: 4.3.0.0
-------------------------------------------- 
ASIC 7628_MP (Port5<->None)
DRAM component: 1024 Mbits DDR, width 16
DRAM bus: 16 bit
Total memory: 128 MBytes
Flash component: SPI Flash
Date:Jul 13 2019  Time:11:46:34
============================================ 
icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768 

 ##### The CPU freq = 580 MHZ #### 
 estimate memory size =128 Mbytes
RESET MT7628 PHY!!!!!! ONLY 0
MT7688 gpio init : wled and wdt by mango

if you press the WPS button will automatically enter the Update mode

0
1
2
3
4
5
6
7
8
9
Please choose the operation: 
   1: Load system code to SDRAM via TFTP. 
   2: Load system code then write to Flash via TFTP. 
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   5: Entr ALL LED test mode.
   6: Entr Web failsafe mode.
   7: Load Boot Loader code then write to Flash via Serial. 
   9: Load Boot Loader code then write to Flash via TFTP.                                                                                                                                  0 
   
3: System Boot system code via Flash.
## Booting image at bc050000 ...
   Image Name:   MIPS OpenWrt Linux-3.18.29
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    1150283 Bytes =  1.1 MB
   Load Address: 80000000
   Entry Point:  80000000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80000000) ...
## Giving linux memsize in MB, 128

Starting kernel ...

[    0.000000] Linux version 3.18.29 (root@iZ2zed141678w8pjz6vc34Z) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 r49378) ) #1 Mon Aug 12 16:49:51 CST 2019
[    0.000000] Board has DDR2
[    0.000000] Analog PMU set to hw control
[    0.000000] Digital PMU set to hw control
[    0.000000] SoC Type: MediaTek MT7688 ver:1 eco:2
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 00019655 (MIPS 24KEc)
[    0.000000] MIPS: machine is WIDORA-NEO
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 08000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x00000000-0x07ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x00000000-0x07ffffff]
[    0.000000] Initmem setup node 0 [mem 0x00000000-0x07ffffff]
[    0.000000] Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] Built 

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